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LM5116: DEMB and compensation network

Mihai Vintila
Intellectual 590 points
Part Number: LM5116

Hello, I am working on a DC-DC converter with LM5116, it has 9-18V input and 7V output at maximum 8A.

Webench is connecting DEMB directly to GND, as I understand this is for starting the converter in a pre-biased load (diode emulation mode).

This is not the case in my application and the question is - should I keep it connected to GND or through a resistor to GND ? I see the eval board has both options. I have added a resistor in the design but I am not sure if it is better to install a zero ohm bridge or a resistor.  And if a resistor is needed - how is the resistor calculated ?

And related to DEMB - the routing for this line should be made directly to the RSENSE GND via (and separated from the CSG trace) ? In the eval board it seems that the DEMB and CSG are tied together close to the LM5116 and then routed with a common route to RSENSE via.

The second issue is about the loop compensation network (between COMP and FB pins) - I have made some designs in Webench and for the same input I got significantly different values for the components in the compensation network. How can I check if the values are correct ?  I tried to follow the explanation in the datasheet but it is not very clear to me.

Thank you,

Mihai

  • 0
    TI__Mastermind 40060 points

    If you do not require pre-biased start up then connect DEMB pin to Ground using a 10kR resistor.

    Yes, connect RDEMB to CSG.back to the Rsense Gnd connection.

    There is a quick start calculator available for download in the product folder.  see link below. 

    You can use this to double check loop compensation.

    Hope this helps?

    David.

  • 0 in reply to David Baba
    Intellectual 590 points

    Thank you very much David.

    Now with the calculator I am getting a third set of values :-)

    But I think I figured out (more or less) the maths behind it so it should work OK.

    There is one more issue - I  have a 4 layer PCB and I will use a GND plane on layer 2 as generally recommended.

    But I have a question about the area under the main switching components (input caps, mosfets, Rsense and inductor) - should I place the GND plane on layer 2 all over the PCB - including the area under the components mentioned above ?  I saw in the eval board for LM5116 that there is GND all over layer 2 - except for the area under the main switching node (mosfets+inductor). On the other hand the App note 2155 says "Cutting the ground plane under the high current path increases EMI."

    So which solution is the best ?

    Thank you,

    Mihai

  • 0 in reply to Mihai Vintila
    TI__Mastermind 40060 points

    Hello Mihai,

     

    The Gnd on layer 2 is recommended.  Also in order to minimize common mode noise due to electrical coupling (DV/DT), it is recommended that you cut out the Gnd section on layer 2, (a "patch") that is under the switch node of the FETs and inductor.

    The issue about cutting the Gnd plane is relating to very large cuts across the board, not small "patches" like the above suggests.

    When large cuts are made across the board (on the Gnd layer), the return paths of differential currents are blocked, making currents flow a long way (Detour) to a return path back to the source.  It is recommended that you minimize the area between the positive and negative current flow and NOT make large cuts across the Gnd layer.  By following this advice, it minimizes parasitic inductance and therefore minimizes magnetic field coupling when you route deferentially, that is to say, the positive and negative currents flow very close to each other canceling the magnetic fields they generate (H-field cancellation).

    I hope this makes sense.

     

    Thanks,

     

    David Baba.

  • 0 in reply to David Baba
    Intellectual 590 points
    Many thanks, that makes sense indeed !