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TPS1H000-Q1: Distinguishing /ST signal (low) status between Open load condition vs. Short circuit condition

Part Number: TPS1H000-Q1


Hello. I am looking at using TPS1H100AQ or TPS1H100BQ as a high side switch in my product. The nominal load current will be 3.5A and an external current limit resistor will be used with the TPS1H100 part to limit the current if the load current exceeded 3.7A. 

For my application, I am running into a problem with the  (/ST) pin. The problem for me is that the /ST pin is driven low in multiple fault conditions. It's driven low when there's an open load and also, when there's an over current condition/short-circuit condition and thermal shutdown. How do I distinguish between these conditions? In my application, I don't have to detect an open load condition. I just want to detect overload/ short-circuit/ thermal shutdown condition. 

How can I implement the circuit to ignore the /ST signal when the condition is Open Load Condition / Short to Battery condition? I am using it for an Industrial Application. So, there's no risk of output getting shorted to battery. 

I am bringing the /ST signal to a small Cortex-M0 processor, and I am also using a processor output pin to enable/disable the high side switch. My plan was to disable the high side switch if the /ST pin went low because of overload/ short-circuit / thermal shutdown conditions. 

Thank You,
Fazlul Karim

Comtrol Corp.

  • Hello,

    The TPS1H100B report the fault on CS pin.

    Over current:  CS pin report the fault and is High = VCS,h

    Open load in enable state (IN high): CS pin is low

    Open load in disable state (IN low) and here there is 2 cases:

           1- VS - VOUT < Vol,off, CS pin goes high and VCS = VCS,h (pull up resistor from VOUT to VS is recommended)

            2- VS - VOUT > Vol,off, CS pin stays low and VCS = 0 (pull down resistor from VOUT to GND in the order of 200K is recommended)

    By adding a pull down resistor on VOUT the CS pin goes high only in case of over current or thermal shutdown

    Regards, Mahmoud

  • Hello Mahmoud, 

    Thank you for the quick response. I have couple of follow-on questions:

    1) How can I use the TPS1H100A (A-version) to distinguish between Open load condition and Short circuit condition, when it's in Enable state. The /ST pin goes low for both of the condition. VOUT stays High, however, when it detects Open Load condition as compared to a Short Circuit condition (VOUT = L). It would make my design a lot simpler if there was a way I could just use the A-version with the /ST status. I can't see a way to do it without monitoring the VOUT with a processor/ comparator too. VOUT goes Low when it's in Short circuit condition but stays High when it's in Open Load condition.

    2) If it's in Enable state and Vout is in Overcurrent/ short-circuit condition, what should I do with the IN signal? If I turn off the channel (IN low), do I have to turn it on periodically to see if the short has been cleared? How many times should I try that before shutting down the channel (IN low) and notifying the user? 

    3) If the channel is in Enable state (IN High) and there's a large capacitive load connected to VOUT, will it not trigger the current limit? How should I control the IN Signal and monitor the CS or /ST pin? Should I keep enabling the channel periodically and if the current limit is no longer triggered, I'll know it was a large Capacititve load?

    4) I am a little confused about the operation of the CS pin. Is it a current source during normal operation but a voltage source during Fault condition? When it outputs Vcs,h?

    5) The MCU I would like to use is a 3.3V part and the ADC's Vref is 3.3V Max. Also, MCU's input pin's Max input voltage rating is 3.6V. Vcs,h could be as high as 4.9V, which would be damaging to my MCU. How can I clamp the Vcs,h to be below 3.3V to detect fault condition? For normal operation, I will use 0 to 3.0V range. 

    Thank you for your help! 

    Best Regards,
    Fazlul Karim

    Comtrol Corp.

  • Hello Fazlul,

    1- Do you prefer to use the A version with ST open drain status? The difference between open load and overload is the deglitch time of 700uS.

    2- The over load is auto recovery and once the fault is cleared the ST signal is high.

    3- The output will charge the capacitor at the current limit level and the charging time is according to Ilim = C dV/dt. the ST pin is low during the charging time and goes high once the capacitor is charged.

    4- That is right

    5- You may use voltage divider on CS

    Regards, Mahmoud
  • 1) Yes, I prefer to use the A- Version. What is deglitch time? Can you help me better understand what the "deglitch time of 700uS" mean for this part? How can I use this condition in my MCU to ignore the /ST low during the Open Load condition? 

    If I understand your answers correctly, the part will go into current limit mode if it exceeds my set current limit of 3.7A and drive /ST low. And, it will protect itself from the overload / short-circuit condition, and completely shutdown if the Tj exceeds maximum Tj temperature. 

    If I keep the IN signal active all the time, the part should still protect itself and my other circuitries from overload/short circuit conditions. Correct? Which means, I don't have to take any action based on the /ST pin's status? Is that correct? 

    What logic can I use to monitor the /ST pin to report an overload/short circuit condition?

    2) Is it in auto recovery both in Over load condition and also, in short circuit condition? Does it turn on the output periodically to check if the overload condition has been removed? How does it detect the overload condition has been cleared?

    3) OK

    4) OK

    5) Can I use a zener to clamp the Vcs,h to 3.3V when it's in fault mode? 

    Thanks,
    Fazlul Karim

    Comtrol Corp.

    Mahmoud Harmouch said:
    Hello Fazlul,

    1- Do you prefer to use the A version with ST open drain status? The difference between open load and overload is the deglitch time of 700uS.

    2- The over load is auto recovery and once the fault is cleared the ST signal is high.

    3- The output will charge the capacitor at the current limit level and the charging time is according to Ilim = C dV/dt. the ST pin is low during the charging time and goes high once the capacitor is charged.

    4- That is right

    5- You may use voltage divider on CS

    Regards, Mahmoud

  • 1- Version A, the ST pin does not report the open load immediately and goes low after 700uS deglitch time. That is right we can not differentiate between over current and open load by only using ST signal and the deglich time does not help. The current limit CL pin can show the difference because in overload CL voltage is 1.233V and it is 0V in open load. CL signal can be connected to MCU input but should be high impedance for not adding error to current limit tolerance.

    The device protects itself but it is user decision to disable the device in case of fault.

    What logic can I use to monitor the /ST pin to report an overload/short circuit condition?
    I'm not sure if I understand this question. The ST needs a pull up resistor to 3.3V or 5V depends on the system. The ST has 2 states high or low and it is user decision on the logic.

    2- The over current loop pulls the FET gate to lower voltage once the load current is higher than the current set and puts the FET in saturation region. The loop is linear and recovery is automatic once the overload is cleared.

    5- I do not suggest a zener on CS pin because it is clamped to Vcs,h in fault condition. It is safer to use voltage divider.
  • "5- I do not suggest a zener on CS pin because it is clamped to Vcs,h in fault condition. It is safer to use voltage divider."

    -- Do I have to the connect the voltage divider's output to another MCU pin to detect the Vcs,h fault condition? For the normal operation, there'll be a Rcs resistor for the current source mode on the CS pin and the MCU pin (with integrated ADC) will connect to the Rcs resistor. How can I have both a Rcs resistor and a voltage divider output going to the same MCU pin? I want the nominal max current of 2.3A to reflect Vcs voltage value of 0 to 3V (going to the MCU ADC pin). I'll select the Rcs resistor value to have that Vcs voltage. Above 3.1V would be considered a fault condition. Please let me know if there are any questions.

    Thanks,
    Fazlul 

    Mahmoud Harmouch said:
    1- Version A, the ST pin does not report the open load immediately and goes low after 700uS deglitch time. That is right we can not differentiate between over current and open load by only using ST signal and the deglich time does not help. The current limit CL pin can show the difference because in overload CL voltage is 1.233V and it is 0V in open load. CL signal can be connected to MCU input but should be high impedance for not adding error to current limit tolerance.

    The device protects itself but it is user decision to disable the device in case of fault.

    What logic can I use to monitor the /ST pin to report an overload/short circuit condition?
    I'm not sure if I understand this question. The ST needs a pull up resistor to 3.3V or 5V depends on the system. The ST has 2 states high or low and it is user decision on the logic.

    2- The over current loop pulls the FET gate to lower voltage once the load current is higher than the current set and puts the FET in saturation region. The loop is linear and recovery is automatic once the overload is cleared.

    5- I do not suggest a zener on CS pin because it is clamped to Vcs,h in fault condition. It is safer to use voltage divider.

  • I have another question regarding TPS2H160 part. I would like to know if both of the channels / FETs can be paralleled? More details are as follows.

    My output current requirement is 2.3A at 30VDC. The maximum Tambient is 70C.

    Can I parallel both channels / FETs to make this device a single channel switch? I believe that should cut the Max Rds(ON) by half at Tj = 150C. It should then be (280 / 2) = 140 mOhms. Will I be able to reduce the Rds(ON) with this method?

    In parallel setting, if IN1 and IN2 is activated at the same time by MCU, would both FETs be carrying equal amount of current out to the load. Theoretically, it should but wanted to make sure because I don't want them it go into current limit mode because one FET is carrying most of the current.

    For my 2.3A load current requirement, I would like to set the CL resistor so that each channel would go into current limiting if the load current exceeded 1.5A. The total current limit with both channels paralleled should then be 3A. According to Figure 25, it seems that it would work as long as the FETs are sharing the load current (each carrying close to half load current).

    I don't want to use the TPS1H100 part instead because one of its functions doesn't work for my application. But, TPS2H160 would work.

    Thank You,
    Fazlul Karim
    Comtrol Corp.
  • Hello Fuzlul,

    I' m writing an application notes about paralleling channels. The technical information is included in the attached draft and I believe it is accurate. Please take a look at and let me know if you have question. I hope this helps

    Regards, MahmoudParallel Switches App Note_MH.docx

  • you can connect 2 resistors R1 and R2 in series and connect the the ADC input to the mid point. Vadc = R2/(R1 + R2) x Vcs and the voltage across R2 is lower than the ADC max voltage = R2/(R1 + R2) x Vcs,h.
    Or you can use only one resistor R2 from CS to GND and in parallel one zener + limiting resistor R1. In linear mode the ADC in measuring across R2 and Vadc = Vcs (zener is not on and is idle). In clamp mode Vadc = Vzener
  • Would I connect it to the MCU as shown in the attached file? R1 between R2 and MCU ADC pin? Thanks! 

    TPS_Vcs,h clamp_zener.pdf

    Mahmoud Harmouch said:
    you can connect 2 resistors R1 and R2 in series and connect the the ADC input to the mid point. Vadc = R2/(R1 + R2) x Vcs and the voltage across R2 is lower than the ADC max voltage = R2/(R1 + R2) x Vcs,h.
    Or you can use only one resistor R2 from CS to GND and in parallel one zener + limiting resistor R1. In linear mode the ADC in measuring across R2 and Vadc = Vcs (zener is not on and is idle). In clamp mode Vadc = Vzener

  • Hello,

    Can you please clarify couple of parameters on the TPS4H160AQ datasheet for me? The maximum Istx (current on STx pins) on the datasheet is -30 / 10mA. What would be the recommended current value? In the Diagnotics section under the Electrical Characteristics table, ISTx = 2mA is shown. 

    I want to drive the LED on an Optocoupler with the /ST pins. When the /ST pin is active, the diode on the Optocoupler would be forward biased.

    For this circuit to operate reliably for a long period of time, I will need /ST pin to be able to sink 5mA whenever it's Active. 

    Thank you for your help!

    Regards,

    Fazlul Karim

    Comtrol Corp.

  • Hello Karim,

    There is no issue with 5mA on ST pin.

    Regards, Mahmoud