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UCC27511: Driving Mosfets in parallel with a single gate signal.

Amal
Expert 1140 points
Part Number: UCC27511

hai,

i am in the process of designing a new inverter. I placed three mosfets in parallel across the upper end of the  transformer and and want to drive the three with a single gate signal.

i would like to use mosfet driver ucc27511 in my circuit. I am using n-channel STP160N75F3 as the mosfet in my circuit.

My doubt regarding the implementation is that , will there be any issue due to the total input capacitance of the mosfet.The mosfet seems to have a input capacitance of 6750pf. Hence the net capacitance in parallel will be 3 x 6750pf. Will this capacitance value effect the proper operation of my mosfet driver? How does the capacitance value effect the oscillation in the gate? What should be done to reduce any such type of oscillations in the gate? Is the mosfet drivers maximum icapacitance having any relation between the net input capacitance of the mosfets in parallel?

  • 0
    TI__Guru**** 189401 points
    Hi Dileep,

    Welcome to e2e, and thanks for your interest in our products!

    We have several low-side gate drivers with higher current capability than the UCC27511. Can you explain a little more about why you selected that device, and your use conditions? VDD, switching frequency, etc? Once we better understand your needs, we can recommend the best TI part for your application.

    If you put individual gate resistors near each FET, they should help reduce the amount of gate ringing and interaction between the paralleled FETs.
  • 0 in reply to Don Dapkus
    Expert 1140 points

    Hai Don,

    Thanks a lot for your reply.

    I am designing a new inverter system. I have placed three mosftes in parallel across the upper end and three across lower end .

    i have designed the schematics in such a way that the upper end (Three Mosfets in parallel ) is driven by a single gate driver and three at lower end is driven by another gate signal.

    as shown above. The gate signal GA1_mcu drives three mosfet gate signals . I am to switch this configuration at 100Khz and the maximum VDD to be applied to the fet is 50v with a total current of 75A in total for all the three fets in parallel.My major doubt is that will the combined capacitance (net capacitance) of the three effect the working of mosfet driver? Do we have to check the maximum input capacitance for each driver in such casses of mosfet paralleling. Will the mosfet paralleling effect the working of the driver? How can i choose a driver which will work well with net capacitance of my mosfets?

  • 0 in reply to Amal
    TI__Mastermind 23105 points

    Hello Dileep,

    Thank you for the interest in the UCC27511. I am an applications engineer working in the same group as Don and will help with your questions.

    I did not see the schematic shown in the previous response from you, indicating there was the schematic of the controller and gate drive circuit. It does sometimes easier to attach a file to E2E, than have the picture in the message.

    Can you confirm the bias voltage to the driver, which is the Vgs peak voltage? And if there are gate resistors in series with the 3 Mosfets connected in parallel? Adding this resistance is our suggestion, as Don mentioned, to help reduce Vgs ringing from layout parasitic inductance.

    The Mosfets you are using are specified at total gate charge, Qg, of 85nC. These 3 Fet's in parallel result in 255nC total gate charge. The gate drive power dissipation needs to be reviewed to confirm if there are Pd or thermal concerns. Refer to the UCC27511 DS section 10.2.2.8.

    The driver dissipation is given by: 0.5 x Qg x Vdd x Fsw x (Roff/(Roff+Rgate) + Ron/(Ron+Rgate)). If there is no gate resistance in series with the gate, the total gate drive power is dissipated in the driver, if there is gate resistance the gate drive power is split between the gate resistance and the driver.

    Assuming no gate resistance; and driver bias of 10V, the driver dissipation will be 127mW which should not be a concern but should be confirmed there is no issue in the application.

    Regards,

    Richard Herring