LM5066I: Resistor to limit current for the dv/dt circuit

Jerry,

You bring up a very good point. We have had no issues with the pnp's failing as is. These are rated at 500mA continuous, but with larger Cdv_dt, currents can be much higher if 50v is discharged. Current will be limited by Hfe of the transistor, which is ~ 70 at 50mA, dropping rapidly afterwards so peaks aren't tremendous and most likely why haven't seen any issues in several years of use. The pnp SOA curve only goes down to 10ms and we will be in the <100ns range so unknown the exact peak the device can take. A (30-50) ohm resistor on the emitter will help and dissipate energy from the capacitor so it isn't a bad idea with higher Cgates to limit peak power and divide the total energy dissipation. If the design is already done and you cannot make layout changes, you can increase the base resistor to help Hfe gain work better. 5k seems reasonable. Check either method in your lab.

Brian

Thanks for the insights and really appreciate the detailed explanation.