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TINA/Spice/LM5100B: Bootstrapping is not working

Part Number: LM5100B
Other Parts Discussed in Thread: TINA-TI

Tool/software: TINA-TI or Spice Models

I am using LM5100 driver in my experiment. I want to shift top side gate pulse to 30V above ground level. I am attaching the circuit simulation model and results. I am not getting desired output at HO. please look into it.snom359.tsc

  • Hi Prashant,

    You are facing above issue as bootstrap capacitor voltage(VHB-VHS) is less than device's Boot-UVLO (6.6V).

    Below is the description from Datasheet about device's UVLO.

    The model worked properly when I decreased the voltage at HS to 5V from 30V(Below is the simulation result).

    If you need HS voltage to be 30V then try to apply a VDD>37V.(PFA tsc file for your reference)snom359_18DEC.tsc

    Please let me know if you have any queries or further questions on this.

    Thanks & Regards,

    Saket

  • Sorry! As images are missing in above Post

    Datasheet Description:

    Simulation Result:

    Regards,

    Saket

  • Hi saket
    Thanks for quick response. I see that this works after making but putting VDD to 37V will make my V_LO level unacceptable ( 0 to 37V). is there any solution for this? are you sure that VDD - V(bootstrap) should be greater than 6.6V? I think this IC is equivalent to HIP2100. please correct me if I am wrong.

  • Hi Prashant,

    Yes, the VHB-VHS should be greater than 6.6V in order to meet UVLO recommendations.

    Below are the couple of snapshots from datasheet which confirms this.

    Could you please explain why you have kept VHS to 30V?

    Regards,

    Saket

  • Hi saket
    I am using this IC for synchronous buck converter where high side mosfet source is not at ground level and needs bootstraping in gate signal. VHS is source voltage of high side mosfet.

    I am agree with VHB-VHS>6.6V
    but my question is different, sorry for my unclear statement in last reply. Let me try to explain again with more clarity.
    Lets say VHB-VHS is Vbs. now
    1. Vbs is not in my control which depends on VDD and High side input pulse. right?
    2. Let say My Vdd is 15V, High side input pulse is 12V(or 15V) and HS voltage is 30V, then High side output pulse will be at level 45V(15+30). right?
    3. No where in datasheet, it is written that Vdd>VHS. is it mandatory condition?
    4. is this part similar to hip2100?
    thanks
  • Hi Prashant,

    In case of buck converter the VHS node will be a switching waveform and you have applied a 30V fixed voltage at it.

    I applied a switching waveform at this node and results seems to be as per your above explanation.

    PFA tsc file and simulation results.

    snom359_19DEC.TSC

    Please let me know if you have any concern or questions on this.

    Regards,

    Saket

  • hi saket
    I was not allowing bootstrap capacitor to get discharged. now I understood about the problem. thanks a lot.