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TPS54260: Duty Cycle Limitations

Part Number: TPS54260

Hello E2E,

Can you run the TPS54260 from:

Vin = 4-48Vin

Vout = 3.3V

Iout = 2-2.5A

Webench keeps spitting out a duty cycle error and I want to make sure I am not violating the minimum on time of the FETs.  According to my calculations. we should be ok.

Thanks for the guidance!

Russell

  • Hello Russell,
    In this case the input voltage is too close to the desired output voltage and i believe that is the reason that Webench does not come up with satisfactory solution.
    Keep in mind that for this device there is also limitation that there is enough headroom (between Vin and Vout) so that Cboot capacitor can be recharged during off time. In the situation where Vin=4V and Vout=3.3V there is simply not enough difference between input and output to charge Cboot.
    For detailed description see section 7.3.4 in the device datasheet as well as figures 25&26 for start/stop voltages for 3.3 and 5.0 v operation.

    Hope this helps.
    regards
    Brani
  • Russell,

    There is another more fundamental issue in play. For low input voltages, the high side FET on resistance may be as high as 500 mohm. So for even 2A output, the voltage drop across the high side FET would be 2 x 0.5 = 1 V. So even at 100 % duty cycle operation, the maximum output voltage at 4 V input would be less than 3.0 V. Not surprised that Webench would not calculate that solution.