• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 655 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS62135: How to understand this device 100% duty cycle operation

Vincent Zhang(BSR)
Expert 4795 points
Part Number: TPS62135


Hi team,

I have some questions about TPS62135.

Is it integrates two N-FET and Cboot?

How to understand 100% duty cycle operation while there needs 80nS toff minimum?

  • 0
    TI__Guru**** 151320 points
    Hi Vincent,

    The 100% mode with NMOS FETs is achieved as in numerous other devices in the market for quite some time now. It is not new.

    The minimum off time is explained in this app note, found on the product page: www.ti.com/.../slyt646.pdf
  • 0 in reply to Chris Glaser
    TI__Expert 4795 points
    Hi Chris,

    What I want to confirm is: Does it integrate Cboot in IC? Does it need time to refresh boot cap? If 100% duty cycle, Ton=Ts, the Toff_min should be zero. That's my confuse.

    In datasheet, it describe【The high-side switch stays turned on as long as the output voltage is below the internal set point.】What if the BOOT-PH voltage is too low to turn on the HS? Is there any BOO-PH UVLO threshold voltage?

    Further, do you have any data about 5VIN， Iout=4A, what's the output voltage? Thanks.
  • 0 in reply to Vincent Zhang(BSR)
    TI__Guru**** 151320 points
    Let's start an email conversation with the specific requirements for your specific customer.

    As I explained, the 100% mode with NFETs requires an internal (or external) BOOT cap. This is not new. It is done by all vendors. The IC itself takes care to refresh the cap as needed.

    As the app note explains, the toff time is not a traditional minimum off time. Rather, it refers to when the frequency begins to drop before 100% mode is entered as the duty cycle increases.