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TPS65217: How long should the PWR_EN pin be held low to cause shutdown

Ajeya Anand
Intellectual 365 points
Part Number: TPS65217

Datasheet says

From OFF State:
• Push-button is pressed (falling edge on PB_IN) OR
• USB voltage is asserted (rising edge on USB) OR
• AC adaptor is inserted (rising edge on AC) AND
• PWR_EN pin is asserted (pulled high) AND
• Device is not in Under Voltage Lockout (UVLO) or Over Temperature Shutdown (OTS).
The PWR_EN pin is level sensitive (opposed to edge sensitive) and it makes no difference if it is asserted before
or after the above power-up events. However, it must be asserted within 5 seconds of the power-up event
otherwise the power-down sequence will be triggered and the device enters either OFF state.

--------------------

Question:

How long should the PWR_EN pin be held low to cause shutdown ??

However PWR_EN itself a power-up event. So does it expect the PWR_EN to go low twice for 5s each to cause a power down ?

  • 0
    TI__Genius 9380 points
    Ajeya,
    I am forwarding your question to the product specialist.

    Thank you for using E2E.
  • 0
    TI__Mastermind 30310 points

    AA,

    There is a similar post here with test results I captured in the lab to explain the behavior of PWR_EN. I think the scope shots are quite clear.

    Please follow-up if you have any further questions.

  • 0 in reply to Brian Berner
    Intellectual 365 points
    Thanks Brian,

    The related question did not answer my question. For power up sequence TI mentions PWR_EN to be asserted for 5s. What is the time duration for power down? Is it same as the deglitch time (link to which was shared earlier )? Also, Does since PWR_EN itself is a power up event, does PMIC need toggling of PMIC PWR EN twice ?
  • 0 in reply to Ajeya Anand
    TI__Mastermind 30310 points

    AA,

    Just to clarify: PWR_EN low-to-high transition is NOT a wakeup event on its own. See Figure 20, Global State Diagram 'NOTES' in the TPS65217 datasheet

    "NOTES: Wakeup = VUSB (rising­) || VAC (rising­) || PB (falling) || Returning from RESET state|| SEQUP bit= 1"

    PWR_EN must go high after one of these 5 wakeup events has occurred in order to transition to the "ACTIVE" state.

    The de-glitch time is always 50ms, and I think the other e2e post I replied to clearly explains how PWR_EN works with clear scope shots:

    "PWR_EN can toggle an infinite # of times in 5 seconds after going high the 1st time and all toggles will be ignored until the 5 second timer expires. After the 5s ends, the next low edge causes the power-down sequence. This timer runs regardless of whether or not the input voltage has recently powered-on. 

    The same thing goes for when PWR_EN toggles low: PWR_EN can toggle many time until the 1s delay expires before the next low-to-high edge is recognized and the power-on sequence occurs."

     

    • To transition out of "WAIT PWR_EN" PMIC needs one low-to-high transition on PWR_EN pin after a Wake-up event to complete the power-on sequence
    • The PMIC will be in ACTIVE state for at least 5 s (unless a fault has occurred) before powering down
    • To transition to SLEEP or OFF, PMIC needs one high-to-low transition on PWR_EN pin
    • The PMIC will be in SLEEP or OFF state for at least 1 s before powering on again

  • 0 in reply to Brian Berner
    Intellectual 365 points

    BB,

    Thanks for the explanation.

    From the reply, I understand that
    1.  There should be a transition on PWR_EN pin (high to low or low to high) to change the state (active, sleep, off) of the PMIC. If the PWR_EN does not have transition (and is either continuously high or remaining continuously low without any transition until 5s timer expires) then state transition does not occur, even if the register values or conditions for transition are met.

    2. Transition is counted only once per 5s and only the first transition is taken into consideration for state transition of PMIC

    3. Only one transition of the PWR_EN from high to low is good for causing the power down sequence ?

    4. PWR_EN going low is not a power-down event


    Did I get it right ?

    Thanks

  • 0 in reply to Ajeya Anand
    TI__Mastermind 30310 points

    AA,

    Yes, your understand is correct.

    The only exceptions are:

    • FAULT - Any fault will immediately begin a transition to the OFF state and enter this state after a 1 second delay
    • RESET - if the nRESET pin is held low (or the Push-button has been pressed for 8 s), the device will immediately begin a transition to the RESET state and enter this state after a 1 second delay

    These transitions can occur from "ANY STATE", as shown in the Global State Diagram in the datasheet.

    New edges on input pins are still stored during the 1 s delay timers and another state machine transition can occur as soon as the timer expires.