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TPS544C25: Compensation calculation

Vidhya Jeyapaul
Intellectual 780 points
Part Number: TPS544C25
Other Parts Discussed in Thread: LM10011, , TPS544B25, TIDEP0041, , TPS543C20, TPS548D22, TPS548D21, TPS549D22

Hi,

I am using  LM10011 +TPS544C25 for the Variable supply CVDD of TCI66382K SOC.

Can you please help me with TPS40k Loop Compensation Tool for TPS544C25? Is there any TPS54K reference tool?

With reference to K2E schematics, how is the compensation and feedback circuit values decided?

Please suggest?

Thanks.,

Vidhya

  • 0
    TI__Guru**** 191445 points
    Hi Vudhya,

    TPS544c25 is not supported by the TPS40k spreadsheet. Your options are to use the Webench on line tool or the pspice average model available here:
    www.ti.com/.../slum462

    I personally use pspice average models when I design loop compensation when it is available. Let me know if you need further assistance.
  • 0 in reply to JohnTucker
    Intellectual 780 points
    Thanks John.

    As per the datasheet of this part, I get to see it to be ROHS non-compliant. It is mentioned as ROHS exempt. Can this part be still used?
    Or is there any dropin part which is ROHS compliant with industrial grade?

    Thanks,
    Vidhya
  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points
    Vidhya,

    This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based
    die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible). All the devices of that series use the same process and are ROHS exempt.
  • 0 in reply to JohnTucker
    Intellectual 780 points
    Hello John,

    As per the ROHS Directive 2011/65/EU 1) lead-based flip-chip solder bumps used between the die and package - is considered to be an exemption. But 2)lead-based die adhesive used between the die and leadframe - is not mentioned as an exemption. Can you please share any reference document wherein 2) is considered to be ROHS exempt?

    Thanks,
    Vidhya
  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points

    Let me see what I can find.

  • 0 in reply to JohnTucker
    TI__Guru**** 191445 points
    Vidhya,

    Yes it does apply. The Exemption 7A does not specify next level of detail, just weight %. This app note shows the verbage (although the 2016 date should be updated ): www.ti.com/.../szzq119c.pdf

    Let me know if you need further assistance.
  • 0 in reply to JohnTucker
    Intellectual 780 points

    Hello John,

    In the K2E or K2L EVM schematics for TPS54C225 part, I see the usage of tantalum capacitors in the output.

    Is there any specific reason?

    To have improved stability, ceramic caps are more preferred as they would have lesser ESR. Is the design recommends, electrolytic caps would be a better option compared to tantalum caps right?

    Your insight on this please.

    Thanks,

    Vidhya

  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points
    Vidhya,

    You did mean TPS544C25 not TPS54C225 correct? TPS54C225 does not exist. What do you mean by K2E and K2L? I am not familiar with those terms. For the TPS544C25 there are placeholders for two Tantalum capacitors, but they are not populated on the EVM. Ceramic caps do have lower ESR and will generally provide lower ripple voltage on the output. TPS544C25 can support Type 3 compensation, so it is very flexible about the types of output capacitors it can support.

    Let me know if this answers your question.
  • 0 in reply to JohnTucker
    Intellectual 780 points
    Hello John,

    So What is the weight % of lead for this TPS744C25 Part?
    Please share.

    Thanks,
    Vidhya
  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points
    Vidhya,

    The breakdown does not appear to be readily available. I can tel l you it is a very small amount. Let me see if our quality team has a breakdown.
  • 0 in reply to JohnTucker
    Intellectual 780 points

    Hello John,

    Sorry that was a typo. It is TPS544C25 part.

    TI K2E and K2L EVM schematic references for this part. Tantalum caps are populated/ mounted in the schematics.

    Do you mean tantalum caps if populated will still give good compensation results ?

    Also this part supports 30A max right?

    I see 25A for 1V designed in EVM. CVDD rail is a variable supply rail (0.8V to 1V). In this case, if voltage is 0.8V, current can increase till 28A. Will the device still support in this case? what is the derating % of the IC?

    Kindly revert asap.

    Regards,

    Vidhya

  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points

    Vidhya,

    I could find no reference to K2E or K2L in the EVM documentation.  If you are referring to C25 and C26, they are definitely not populated.  You can see this from the BOM on page 45 of the users guide as they have a quantity of "0".

    The EVM circuit is designed for 30 A output current for TPS544C25 and 20 A for TPS544B25.  The output voltage for each is 0.95 V. the output current is basically independent of the output voltage.  There are derating curves on pages 15, 16 and 17 of the datasheet.

    Let me know if you have further questions.

  • 0 in reply to JohnTucker
    Intellectual 780 points
    Hi John,

    you are not referring to the right EVM. The one you have mentioned C25,C26 are for 0.95V constant output.

    I meant smart reflex operation with LM10011 and TPS544C25 (0.8V to 1.1V for TCI6638K2K SOC).

    TI_K2L_EVM_SCH_16_00176_02 is the reference EVM (pg- 43)

    K2E- TIDEP0041 document number (page-7)

    For smart reflex, Power is fixed but voltage varies.
    Kindly revert asap.

    Regards,
    Vidhya
  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points
    Vidhya,

    It looks like those designs were developed by an outside contractor three years ago. I will see if I can track down a contact person. Most likely I will not be able to answer any detailed questions about the design procedure or how the compensation was derived. As you may know, there are many possible valid solutions to compensating a closed loop buck converter. I will let you know what I find one way or the other this week.
  • 0 in reply to JohnTucker
    TI__Guru**** 191445 points
    Vidhya,

    Looking closer at that schematic, it looks like a common compensation method was used where the compensation poles and zeros are used to cancel the double pole of the LC filter and ESR zero. The zeros are located at 8.56 kHz and 10. 63 kHz. They are placed at approximately the LC corner frequency to cancel the double pole. The first compensation pole is at 36.2 kHz, which is used to cancel the ESR zero of the output capacitors. The final pole is a high frequency roll off pole at 188 kHz.
    Let me know if you need further assistance.
  • 0 in reply to JohnTucker
    TI__Guru**** 191445 points
    What additional info do you need? Please let me know.
  • 0 in reply to JohnTucker
    Intellectual 780 points
    Hi John,

    For TCI6638K2K SOC- CVDD smart reflex supply - (0.8V to 1.1V) LM10011 and TPS544C25 device is used.
    TPS544C25 part supports 30A max.

    Say K2K estimator sheet worst case power is calculated to be 23W. In this case, if voltage is 1V then current is 23A but if it is 0.8V, current can increase till 29A. Will this 30A device still support in this case? what is the derating % of the IC?

    Or should we look for another converter 35A/40A part for TPS544C25 (30A) part?

    Also I referred to sprabv0 - page 10 smart reflex VID value mapping - How is this mapping done?
    Is this controlled by TI SOC? There is no hardware setting for this part. VCNTL control between TI SOC and LM10011 DAC does this mapping.


    Kindly revert asap.

    Regards,
    Vidhya
  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points

    Vidhya,

    TPS544C25 can support up to 30 A output current, so 29 A is not an issue. Of course you have to design your board and system for proper thermal performance.  Figures 19 thru 31 in the datasheet show the safe operating area curves for different conditions.  Thse curves are based on the TI EVM   TPS544C25EVM-681 pcb design.  Thermal performance is greatly dependent on PCB design, air flow, etc, so yo may be able to design a more thermally efficienct design by adding additional layers of copper and larger copper areas to your PCB.


    As far as mapping is concerned, I can only relay what is in that design manual. It states that each individual KeyStone II device is permanently programmed with a specific 6 bit SmartReflex code for its optimal operating voltage. That code is decoded by the LM10011 and sts the converter voltage appropriately. The mapping table is based on that production test data.

    Generally in this forum, we can answer dc/dc converter specific questions such as current rating, compensation, etc. For details in the SOC operation you be best served to post in the KeyStone or High Perfmance Computing specific forums.
    e2e.ti.com/.../639
    e2e.ti.com/.../952

  • 0 in reply to JohnTucker
    Intellectual 780 points

    Thanks John.

    Can you suggest an alternative part for TPS544C25(30A) in case? whose functionality and package remains the same with higher current support?

    Kindly revert asap.

    Regards,

    Vidhya

  • 0 in reply to Vidhya Jeyapaul
    TI__Guru**** 191445 points

    Vidhya,

    TPS543C20 is a 40 A device with the same package and similar but not identical pin out.  Also it does not have PMBus.

    TPS548D22 is also a 40 A part with the same package, similar but not identical pin out and slightly different function without PMBus.

    You can also look at TPS548D21:

    And TPS549D22:

    Let me know if one of those solutions will work for you.