• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 1054 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMG5200: spike output SW

sidhoum yacine
Prodigy 110 points
Part Number: LMG5200

hi i am using LMG5200 for new design bldc and i have spikes 45vdc at the output SW pin8

so i have pwm 0/5vdc at the input HI and reverse PWM/ at LI  ,between HS and HB  i have capacitor 100nf 

and VIN 24vdc  ,does capacitor between PGND and VIN is the solution ? 

best regards 

  • 0
    TI__Expert 3225 points
    Hello Sidhoum,

    Thanks for your information. How many volts of overshoot are you having with 45V DC bus voltage? To have small overshoot, there are two things need to take care in the layout:

    1. Please have the 100nF cap as close as possible to the HS and HB pins, since this cap is part of the gate drive loop, and needs small inductance.

    2. Please have DC bus capacitors as close as possible to the PGND and Vin pins. Also please try to have some small package, low inductance ceramic caps (like 0.1uF) closest to the pins. This can help reduce the loop inductance, and absorb high frequency noises generated by LC resonant during switching transient.

    Thanks and regards,
    Lixing
  • 0 in reply to Lixing Fu
    Prodigy 110 points
    thanks for your quick reply

    my system working on 24vdc for that VIN =24vdc

    i put the cap 100nf too close HS and HB . "i use only ceramic caps 50vdc"with small inductance

    i add cap1=47uf and cap2=100nf between PGND and VIN all the caps are too close to the pins


    i have now spike up to 43.12v
    and other negative spike up to -10.31v

    does the dead time between the 2 signals HI and LI can be the solution ?

    Best regards
  • 0 in reply to sidhoum yacine
    TI__Intellectual 805 points

    Hello Sidhoum,

    Those voltage spikes seem two large. I will make two recommendations.

    • Please make sure the probing is done correctly. When measuring between PIN 8 (SWT) and PGnd, please make sure that you are using a pigtail for ground probing, and not using the passive probe's ground attachment. If you use probe's ground cable, this will add a lot of inductance and will cause oscillation which otherwise don't exist. We come across with this quite often, therefore wanted to make sure probing is done correctly.
    • In addition to Lixing comments, the power loop should be returned from midlayer-1 if it's a 4-layer board. This is to minimize the power loop inductance. Example can be found in the datasheet of LMG5200 on page 17.

    Please let us know of your progress.

    Regards,

    Serkan

  • 0 in reply to Serkan Dusmez
    Prodigy 110 points

    thanks for all  ,i am waiting for the new pcb 

    best regards