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LMR14030-Q1: Synchronizing to an External Clock

Part Number: LMR14030-Q1

Hi

I have some question about external sync configuration.

Q1:Why does Rterm need? What is it concerned?

Q2:Is there any relation or constraint conditions between Internal Frequency and external synchronization frequency?

        i.e. FREQ(RT)=2MHz, SYNC FREQ=450kHz.  Is this possible?   Our customer would like to use the external clock is 500kHz.

      How much should we set the internal frequency by RT?

Q3: Rterm is calculated with the following equation.  

         Rterm= N * Input clock voltage / signal source current.         (N is a number of Rterm if the LMR140xx is more than two.)

Q4:If the Rterm value which is calculated with above equation is 9.9k, should we set the Rterm more than 9.9k or less than 9.9kohm?

Q5: If that external clock which is used to LMR140xx is connected to other device (is not LMR140xx), should we consider the input impedance of the clock pin of the device?

Q6: If the clock signal source (MUC or etc..) is push pull output type, the current is defined as Max current  (sink/source). Do we need to calculate with Min current of that? (not Max current)

Regards,

Koji Hamamoto

 

  • Q1:If the output of Lo-Z clock is unknow (such as Tri-state) when you disable Lo-Z clock, the internal PLL may don't know what the real value of the RT pin. So the Rtem is used to pull down output of Lo-Z clock to GND. Normal, the clock is a GPIO, GPIO has limited current sourcing capability, it can't drive small terminal resistor like 50 ohm. so the R-term has to be 1K~5K ohm in most case.

    Q2: If you use the external clock, the internal will be disable. when you disable external clock, the internal starts to work. For a lo-Z clock, RT=RT(freq)-Rterm. RT(freq)=equation 8 in DS。 For Hi-Z clock, use equation 8 to set Rt

    Q3: and Q4:For low impedance signal clock, just set Rtem=1K~3Kohm. I don't understand what's the application you describe

    Q5: For other device, i still need to consider the input impedance of the clock pin of the device. You also need know the internal logic of the device for better using.

    Q6: As Q1 talk, you need to consider the current capability of the signal clock.

  • Hi Vental-san,

    Thank you for your support.

    Q1: In case of low-z source , what is it concerned if the configuration is high-z case?
    The RT is connected between RT/SYNC and GND in this case.

    Q2: Our customer is used this device at the both of external clock and internal clock.
    Is there any limitation? I understand the equation 8. However my question is about the limitation between external clock frequency and internal clock frequency. (i.e. internal freq : 200kHz and external freq : 600kHz is possible? )

    Q3: It is when N=3, input signal voltage =3.3V, Source current = 1mA.

    Regards,
    Koji hamamoto
  • Q1: For low-z source, refer to the left circuit in figure 17 no matter what's your configuration.

    Q2: it's OK for internal freq : 200kHz and external freq : 600kHz

    Q3: I'm sorry, i still don't understand your equation. How did you get this equation?

  • Hi,

    Q1-----It dpends on the output impedance at idle mode of external low-Z clock, if it's low impedance, the Fsw will be much higher than target and may casue circuit damage. impedance matching is not critical here as clock freq below 2.5MHz.

    Q2------the external clock freq should be close to RT mode freq (better within +/-20%) for lower output voltage ripple during mode changing,

    Q3/Q4---equation is correct, but if the clock only can source 1mA, it maybe considered as high-Z clock.

    Q6---you need to consider min source current for proper Rterm resistor selection, if calcultaed Rterm is bigger than 1/5 of RT, then you can use high-Z configuration, but add one small Schottky diode to isolate ext clock and RT pin if multi LMR140X0 are used.