Hello TI,
The FPGA being powered by the TPS62180 in our design has VccSense and GndSense pins which provide an unloaded view into the conditions of the 0.9V core rail directly on the die. Use of these pins is optional.
Would there be a suggested way to use the TPS62180's VO pin (possibly in conjunction with AGND) for this load sense purpose, or would it be preferable for VO to be directly connected to the first (closest) output cap on the converter output instead, considering the converter's Current Mode control architecture?
