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TPSM846C24: Requirements

user5087263
Intellectual 390 points
Part Number: TPSM846C24

Regulator input, output and current requirements.
Input Volts = 4.0V - 6.0V DC
Output Volts = 0.95V DC
Max Current = 20A

Architecture:
In our design we will power the regulator first with default setting, and this power is used for powering an FPGA,
Once the FPGA is powered,On need basis we want to provide SYNC clock generated from FPGA to the SYNC pin of the regulator,

Kindly confirm, our method of providing SYNC clock is Ok,
Also when this SYNC clock is applied, the regulator output voltage should not be altered.
Kindly let us know by providing external sync will there be any major concerns of overshoot and undershoot at output voltage.
Please Do reply as soon as possible.

  • 0
    TI__Guru 50120 points

    Hi user5807263,

    What is the acceptable output voltage fluctuation for the module that you are okay with in your system? 

    In your system, the module is powered up which results in powering the FPGA that will send the SYNC signal back to the module. Section 7.3.6.2.1 in the datasheet specs the TPSM846C24 to have a small output voltage disturbance after the SYNC signal becomes active after the module has been powered-up. If the SYNC signal is interrupt and lost during operation, there will be another disturbance in the output voltage as the TPS846C24 reverts back to the switching frequency set by the R_rt resistor. 

    Regards,

    Jimmy 

  • 0
    TI__Mastermind 28020 points

    The main concern I see with this application is the input voltage range. The TPSm846C24 will not turn ON until Vin 4.5V.

    If an external SYNC signal is applied after the device is running, the device will continue to run and lock to the SYNC frequency. There may be a slight disturbance as the SYNC signal is applied. A typical waveform is attached.

    Waveforms: Blue = Vout, Purple = PH, Yellow = External Sync Clock

     

     

    C24SYNCWaveforms.docx