TPS565201: About VREG5(Regulator) in 7.2 Functional Block Diagram

1), Yes, you are right
2),NO, UVLO monitor the VREG before VREG5=ON
3), I think the UVLO is relation to the Vin. Not the internal specification UVLO in 7.2. For the internal spec UVLO, it will be than Vin UVLO.

Hello Vental,

 

Thank you for reply.

I have informed information from you to my customer.

I have some additional question.

 

(Question)

(4) What purpose is VREG5 used for?

Is it used for except VBST?　(For example logic power.)

 

(5)About UVLO of your previous answer: (2) UVLO monitor the VREG before VREG5=ON.

In this case, is it meaning UVLO in 7.2 Functional Block Diagram(VREG5) ?

Or is it meaning UVLO in 6.5 Electrical Characteristics(Vin) ?

 

(6) They understood that there is each UVLO for Vin and VREG 5. (two UVLO)

Do you have some information about UVLO for VREG5?

For example, threshold voltage, characteristics and timing.

 

Regards,

Tao2199

4) the main purpose is to charge the boot cap.
5) ans 6), I need to double check and give you reply later

Hi Tao,

The block diagram is a system level simplification of the internal circuit. VREG5 is the internal 5V regulator that power the boot cap, analog and digital circuit. It is the power supply that for all the internal circuit.

Hello Anthony,

Thank you for reply.

I informed your answer to my customer.

Would you let me know current status of remaining confirmation items?

regards,

tao2199

Hi Tao

I am Katushiro Kanao and in chargeo of same cusomer.

1. VREG operating condtion.

I want to conirm again for VREG operating condtion.

You mentioned  VREG is disalbed untill EN is enable, but   EN logic needs a power for logic,

Do  you means this IC has 2 power circuit, one is VREG, the other is power for EN ?

2. OVP

Thier is a OVP circuit in Block diagram.

But there is no specification and no descripion  of OVP in datasheet.

Does TPS565201 have OVP circuit?  If it is, why OVP is not specified in data sheet ?

I would appredcate your suppoort.

best regards K.Kanao

Hi Kanao,

1. There should be other ultra-low power circuit supply for EN circuit first, when VERG5 is enabled, it siwtched to power supply for EN circuit as well as other analog circuit.

2. TPS565201 has OVP circuit. When OVP happened, both HS&LS turned off.

Best Regards,

Vincent Zhang

Hi Vincent
Thank you for your reply.

Would you please reply Tao's question for UVLO ?
This IC seems have 2 UVLO, one is VREG output( in data sheet block diagram) , the other is for VIN ( according to Mao's ansower )

5)About UVLO of your previous answer: (2) UVLO monitor the VREG before VREG5=ON.
In this case, is it meaning UVLO in 7.2 Functional Block Diagram(VREG5) ?
Or is it meaning UVLO in 6.5 Electrical Characteristics(Vin) ?


(6) They understood that there is each UVLO for Vin and VREG 5. (two UVLO)
Do you have some information about UVLO for VREG5?
For example, threshold voltage, characteristics and timing.

best regards K.Kanao

Hello Vincent and Kanao,

Thank you for following.
I will informed your answer to my customer.

Regards,
Tao2199