UCD9090: programming issue with GPIO pins unexpectedly turn on and off

1. The project file updates the setting(operation memory) on the fly, many factor can contribute the IO glitch. that's why we recommend to use data flash file to program to avoid the such glitch.

2. project file import is equivalent to write to the operating memory.

Change flash does not impact the IO that's why data flash file is recommended.

Regards

Yihe

Thanks.
So Can I understand like this -- You don't recommend change anything to the operating memory during the UCD9090 normal operation.

In such way, it seems that we have no choice but to use data flash file to program to avoid glitches.

Our UCD9090 already is in the field. We would like to change the configuration via our on board SOC. If we use data flash file, for sure we need to reset the UCD9090 and also in our design, we dont have hard-reset for UCD9090 (Pin 3 Reset is always pull-up to 3.3v with resistor). The problem is that UCD9090 control all the power rails for this SOC. If you issue a soft-reset to UCD9090, it would shutdown all the rail for the SOC.

Any suggestion regarding this?

Or shutdown all the power for our product can be considered as reset for the UCD9090？

Fei

Or another question. Can we program the on-board UCD9090 via data flash file with on-board SOC? is it possible?

if you want to update the setting on the fly, it is up to the scope of the change. if you just change the threshold, you can set the invidual pmbus command to change and issue STORE_DEFAULT_ALL to write to the changes into flash. this way, you will not see any IO changes.

There is no need to import the whole project file.

We can better help if you know exactly what are the changes?

yes, you can program the ucd9090 from any I2C master via the data flash file. but you have to reset the UCD to let the new settings take effect.

Regards

Yihe

Thanks a lot.

we want to change the fault response as well as the shutdown slave as follow

// Write SEQ_CONFIG [MFR 38,Rail #7] Rail On Dep: <None> | GPI On Dep: <None> | Rail Off Dep: <None> | GPI Off Dep: <None> | Fault Dep: <None> | Enable: Unassigned; Seq On Timeout: 0 / Wait Indefinitely; Seq Off Timeout: 0 / Wait Indefinitely
WriteByte 0x4C 0x00 0x06EA
BlockWrite 0x4C 0xF6 0x0C000000000000000000000000D9
// Write FAULT_RESPONSES [MFR 25,Rail #7] Retry Time: 0 msec| Max Volt Glitch Time: 0.0 msec| Max Other Glitch Time: 0 msec| VOUT_OV: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| VOUT_UV: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| IOUT_OC: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| IOUT_UC: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| OT: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| TON_MAX: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A
BlockWrite 0x4C 0xE9 0x0900000000000000000030

// Write SEQ_CONFIG [MFR 38,Rail #8] Rail On Dep: <None> | GPI On Dep: <None> | Rail Off Dep: <None> | GPI Off Dep: <None> | Fault Dep: Rail #1,2,3,4,5,6 | Enable: Unassigned; Seq On Timeout: 0 / Wait Indefinitely; Seq Off Timeout: 0 / Wait Indefinitely
WriteByte 0x4C 0x00 0x07ED
BlockWrite 0x4C 0xF6 0x0C00000000000000000000003F64
// Write FAULT_RESPONSES [MFR 25,Rail #8] Retry Time: 0 msec| Max Volt Glitch Time: 0.0 msec| Max Other Glitch Time: 0 msec| VOUT_OV: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| VOUT_UV: Resequence: Disabled; Glitch filter: Disabled; Response: Shut down immediately; Restart: Do not restart| IOUT_OC: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| IOUT_UC: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| OT: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A| TON_MAX: Resequence: Disabled; Glitch filter: Disabled; Response: Ignore; Restart: N/A
BlockWrite 0x4C 0xE9 0x090080000000000000008F


BR,

Fei