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LM5088: drop in switching frequency during step load, why?

HKH
Prodigy 105 points
Part Number: LM5088

Hi,

my LM5088 design seems to drop in switching frequency at heavy load step.

Please, could you help me understand why?

Current limit is around 1,1 A and switching frequency is approx. 150 kHz.

This is my schematic:

I would like to note that there is additional 220uF on the input and when I measure VIN directly on U1, the input voltage is rock steady.

Load step 0 - 0.5 A demonstrates nice response:

Load step 0 - 1.6 A here I see drop in switching frequency:

Green = V(+48V:GND)

Purple = I(load)

Red = I(L1)

As said, the input voltage does not drop, it is rock steady, so I beleive that it is not due to the dropout monitor,

though the dropout monitor is the only function which should be able to cause this behaviour, as I see it?

Please help.

thank you,

HKH

  • 0
    TI__Mastermind 40060 points
    Hello,

    Looking at your component selection I am not sure your loop is stable, it is likely you have sub harmonic oscillation/Stability issue when the load step is introduced and you have a dropping of frequency as a results, because the thin pulse is so thin it is truncated to 0s and missing entirely. I would check your design with the quickstart calculator to make sure you have a stable design. Set the Quick Start to Vin min and Vout max/Iout max to obtain the values needed for a stable design. If you need some quick recommendations, I would change the following.

    R6 = 10k
    C7 = 2.2nF
    C3 = 1.5nF

    Also, just observing your inductor current. If you have 0A load current, there should be not be any negative current in the inductor as this is a non sync device. I am not sure how the inductor current is being measured, but in general terms, in a non sync buck design, the Duty cycle should change drastically from DCM to CCM mode. I see the change in duty cycle, but I dont see any evidence of DCM operation before the load step? So something does not add up? Do you have AC coupling on you current probe at all?


    Hope this helps?

    David.
  • 0 in reply to David Baba
    Prodigy 105 points

    David Baba said:
    Hello,

    Looking at your component selection I am not sure your loop is stable,

    Loop should be stable, both in calculation, simulation and measurement; 8kHz BW, 20dB GM, 60° PM.

    David Baba said:

    the thin pulse is so thin it is truncated to 0s and missing entirely

    But that should cut fsw in half? fsw drops to 2/3 ...

    David Baba said:

    I would change the following.

    R6 = 10k
    C7 = 2.2nF
    C3 = 1.5nF

    Lowering C3 would increase current emulation slope and hence decrease output current capability. Also datasheet states that it is important to have matching L, Rs and Cramp (Cramp=gm*L/Rs/A), so in principle I should simultaneously decrease L or increase Rs accordingly. I will test though.

    David Baba said:

    Also, just observing your inductor current. If you have 0A load current, there should be not be any negative current in the inductor as this is a non sync device. I am not sure how the inductor current is being measured, but in general terms, in a non sync buck design, the Duty cycle should change drastically from DCM to CCM mode. I see the change in duty cycle, but I dont see any evidence of DCM operation before the load step? So something does not add up? Do you have AC coupling on you current probe at all?

    I have been wondering as well; current is measured using Agilent (Keysight) 1147A directly on a ~ 3 cm wire in series with the inductor.

    I will double check and come back.

    Thanks,

    HKH

  • 0 in reply to HKH
    TI__Mastermind 40060 points
    Correct, reducing C3, will increase Vslope. When reducing C3, you may have to decrease Rsense also, to avoid hitting current limit.

    But more Vslope will help avoid potential SHO issues. Increase Vslope will effect loop response, so I suggest using the values mentioned above...

    Hope this helps?

    David.
  • 0 in reply to David Baba
    Prodigy 105 points

    Hi David,

    the negative current is real and exists in the sense resistor alright. I beleive that it might be due to the pre-charge switch which is active for ~ 300 ns at the beginning of the off-time?

    I experiemented and measured using various loop compensation components and nothing really seems to do the trick.

    I can also not see how the frequency drop can be caused by SHO. Frequency should still be constant despite SHO?

    Yellow = GATE (diff probe)

    Red = inductor current

    Green = output voltage

    Frequency remains constant if input is turned up to 62 V.

    I strongly beleive that it is related to the dropout monitor, maybe the approximation given in the datasheet is not precise enough in this case.

    /HKH

  • 0 in reply to HKH
    TI__Mastermind 40060 points

    Hello,

    Agreed, if the device goes in to drop out (Duty cycle saturation) , the frequency will shift as the part try's to regulate the output voltage.  It looks like that there is a perturbation on Vin that causes the part to go into drop out mode momentarily.