Hi there,
The layout example provided in the datasheet suggests that the switching node pass through the input decoupling cap.
As we understand that the switching signal is quite noisy, wouldn't the noise be coupled to Vin?
Please advise. Thank you!
Best regards,
Roy Hsu
Hello Roy,
It's nice a pleasure to support you!
You are right when you say that the swithching pin is noisy, but in a layout all depends on how the coupling is done between noise sources and sensible signals. What actually radiates are the currents and in this layout, referring to the coupling with the input capacitor, the inductor current has less contribute than the input current of the IC itself.
The input current in a buck is per definition trapezoidal, oscillating between 0A and Iload if considered as a square wave (inductror ripple neglected). The inductor current has instead a triangular shape with an offset equal to Iload. Hence the harmonic content is less in the inductor current than in the input current. On top of this we need to consider that the air coupling of the inductor current with C1 is not perfect.
But let's suppose for a moment to move C1 to the left and leave space for the inductor (figure below). This is the worst thing one could do in a power supply layout, because one is creating a large loop pf high frequency content currents.
This indeed has many effects:
-worst EMI: the radiating factor of this loop is most likely to be efficient at the noise content frequencies
-worst Vin noise: a loop is an inductance. The input square wave current has high discontinuities, that means voltage overshoots in Vin
-likelihood to break the device: the above mentioned overshoots can be way higher than the abs max pin values.
My advise is to follow the datasheet recommendation as a starting point for your layout.
