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TPS7A37: OCP waveform

Johnny Guo
Expert 4910 points
Part Number: TPS7A37

Hi, team,

I just need your help to confirm if below TPS7A3701 OCP waveform is a normal phenomenon or not. I cannot see detailed description about the OCP.

Thanks.

Johnny

  • 0
    TI__Guru 55940 points
    Hi Johnny,

    The image pixilates when I try to enlarge it. What is your Vin, Vout, and Iout conditions for the waveform? Are you using an electronic load to force the current?

    It looks like the LDO is going into thermal shutdown. While the output is off due to thermal shutdown, the load is still trying to force the output current; however, it is not able to when Vout is 0 V. When the LDO cools and the thermal shutdown circuitry allows the LDO to enable again, the current returns to the set value until the LDO again enters thermal shutdown.

    Very Respectfully,
    Ryan
  • 0 in reply to Ryan Eslinger
    TI__Expert 4910 points
    Ryan,

    Just need to confirm with you, when OCP happens, is device in latch or retry mode?
    In thermal shutdown, the device seems to be in retry to turn ON.

    Thanks.
    Johnny
  • 0 in reply to Johnny Guo
    TI__Guru 55940 points

    Hi Johnny,

    The current limit circuitry does not turn off anything so it does not fall into either latch or retry categories.  Rather, the current limit circuitry reduces the amount of current through the LDO during fault conditions.

    Very Respectfully,

    Ryan

  • 0 in reply to Ryan Eslinger
    TI__Expert 4910 points
    Ryan,

    So how can we test the current limit performance? If still using E-load to increase output current, I think the thermal shutdown will still be triggered.

    Thanks.
    Johnny
  • 0 in reply to Johnny Guo
    TI__Guru 55940 points

    Hi Johnny,

    Rather than force the output current with an electronic load to test current limit, we force the output voltage to a lower voltage than the set voltage.  As Vout drops outside of regulation, the error amp will drive the pass element to allow more current to pass through the LDO in an attempt to bring the output voltage back into regulation.  You will of course want to make sure that the current limits on your power supplies exceed the current limit of the LDO.  Please note that this is the method we use to test current limit for TPS7A73.

    You will still need to be cognizant of how much power you are dissipating in the LDO to prevent thermal shutdown.  Since the power dissipated in the LDO is Pd = (Vin - Vout) x Iout and you are maximizing Iout in this test, you will want to be careful about how much headroom (Vin - Vout) you are allowing.

    Keep in mind that thermal shutdown for TPS7A73 will disable the device when the junction temperature reaches approximately 160 C.  The junction temperature of an LDO is estimated as Tj = Pd x  RθJA + Ta where RθJA for TPS7A73 is 67.2 C/W and Ta is your ambient temperature.

    Very Respectfully,

    Ryan

  • 0 in reply to Ryan Eslinger
    TI__Expert 4910 points

    Ryan,

    Thanks. I will do the test to see the result.

    Johnny