Hello application team,
Could you advice about the minimum acceptable value of the bypass cap on the VREG?
The reason why I ask it is to consider DC bias effect on ceramic caps. (e.g. the effective capacitance of 4.7uF reduces about 2uF at 4.7V bias condition)
This information is important to select a proper bypass cap.
Thanks in advance.
Shinya Sawamoto
TI Japan East area FAE