• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 63 subscribers
  • Views 375 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS650231RSB vs. TPS650231YFF pin differences

Aaron Spaete
Expert 4527 points
Other Parts Discussed in Thread: TPS650231

Team,

Is it true that the TPS650231 lacks the LOWBAT_SNS and LOW_BATT PWRFAIL pin on the YFF package?  If so, what method does one have to get that functionality back in order to use that package.  Is seems that the BGA actually has more pins (49 vs. 40).  Not sure why these aren't brought out. 

Thanks,

Aaron

  • 0
    TI__Guru**** 150900 points

    From examining the pin functions tables in the datasheet, the chipscale package has less functionality than the QFN.  This is simply the tradeoff of going from a 5 x 5 mm package to a 3 x 3 mm package--a 64% reduction in board area.  Note that some of the balls (pins) on the chipscale device are paralleled.  This allows more current to flow in those nets, since generally a ball does not handle as much current as a QFN pin.

    The chipscale device lacks the following pins: /hot_reset, /respwron, /low_bat, lowbat_sns, and /int.