Hi:
As the SCH, the voltage of the source pin (Q3) is about 2V, so the voltage of VDD is locked to 0V.
Could you pls check if any mistake in this SCH. Thanks!
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Hi:
As the SCH, the voltage of the source pin (Q3) is about 2V, so the voltage of VDD is locked to 0V.
Could you pls check if any mistake in this SCH. Thanks!