TPS2490: Nuisance trigging of soft start?

Hi Axelsson,

Thanks for reaching us on E2E.
We will look into this and get back to you soon.

Best Regards,
Rakesh

Axelsson,

Glitches (as in line disturbances, either low freq or high freg, can cause a number of things to occur. HF noise could potentially trip the VCC UVLO (set for 8.3v nominally) to trip, even if you don't quite drop to 8.3v due to HF AC coupling impact inside the IC. Hence the need for a small 0.1uF on the Vcc node. Place this cap at the Rsns, not at the IC pin. This prevents the current sense lines from seeing a DM noise (see layout section 10.1)and falsely tripping CL as it converts it to CM noise, more easily rejected by the IC. It also filters the Vcc on the IC as long as you don't have excessive length. Keep the TPS2490, FET, Rsns on the same plane with as short routing as you can. Recommend you implement the divider resistor shown in fig 18 and also place a NP 0.22uF cap across R1. Keep the resistors under 10 ohms and you can NP R1 until you know you need it for tweaking CL if necessary. May save a re-layout.

LF disturbances, once recovering, will cause a lot of inrush into the extra high level 25000uF cap bank. This can easily cause a current limit condition, that may recover and softstart begin again once running, causing the problem you note (extra stress on the FET). Keep in mind the energy the FET sees during start up = 1/2CV^2, same as the energy in the 25000uF cap bank. Obvioulsy wise to use dv-dt control and spread this energy out over time as you are doing. If possible, choose lower value capacitors with better ESR as that will keep transients in order better and reduce FET stress.

You really want to assure PG prevents any down stream load from activating until after softstart is completed.

Brian

Hi,
I am not really worried about the HF performance of the design, I have followed the design guides thoroughly. I would like to add some more information to my case which may be essential for the full understanding of my query; the primary side is battery powered and it is not 100% reliable which means there is a possibility that the battery power may drop out momentarily in an short but undefined duration. To summarize, it is more likely that Vcc or EN will disappear (Vcc goes hi-Z, EN goes to GND through 100k) for a short time. Is there a combination of Vcc and EN states which will cause soft start to re-activate after power up? Then I will try and reproduce in the lab and ultimately find a remedy. (Please note that the remedy does not involve re-design of the battery connection).

Regards /Per