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UCC28251: Design of smps using ucc28251

SUBASH CHANDRA BOSE M
Intellectual 320 points
Part Number: UCC28251

Hi Team,

              We develop a smps using ucc28251. And my question is the pulse from the device(ucc28251) is not varying linearly. when it starts to regulate the output voltage,pulse width keeps on changing like D=0.45 to 0.1 but the output voltage is constant. Because of that the transformer making humming sound. Why so? If input voltage is higher than that of required output voltage, then the duty cycle should be low right? but in this case the pulse width is oscillating from high to low. Reply to me as soon as possible thanks.

  • 0
    TI__Expert 3095 points
    Hi Subash Chandra,
    There are many possible reasons that the duty cycle can very from cycle to cycle. To answer your question I need to know a little more about your particular schematic. Please can you share your schematic with me?
    In particular I need to know the following information:
    1) What is the power stage topology. Does it operate in CCM or DCM.
    2) Control mode are you operating with current mode or voltage mode control.
    3) Does the duty cycle variation happen at all load & line conditions or just some.
    4) Waveforms showing the COMP pin voltage and Gate waveforms would help me to understand more about the issue.
    Thanks
    Joe Leisten
  • 0 in reply to Joe Leisten
    Intellectual 320 points

    Hi Joe Leisten,

                            Thank you for your timely reply.Here are the answer to your questions. And I checked circuit to regulate for 40V but same problem happening(pulse width changing).

    1.It is SMPS about 300V and 10A.It is designed to operate in CCM.

    2. The control mode which we have used is voltage mode control.

    3. It is varying for no load also.When it starts to regulate,the pulse width keeps on changing.

    4. Gate waveform pulse width is changing continuously when it regulates, So I cannot take photo since it is changing.What shall I do?

  • 0 in reply to SUBASH CHANDRA BOSE M
    TI__Expert 3095 points
    Hi Subash Chandra,
    Thank you for sending such excellent waveform pictures.
    The reason for your unstable duty cycle is clear from the "VCOMP voltage while regulating" waveform.
    You will notice that this is not a fixed DC value, as one might expect for fixed input and output voltage conditions.
    It has a periodic waveform with frequency a little above 1kHz.
    This indicates that your control loop is unstable.
    They duty cycle follows the VCOMP voltage exactly hence you observe the variation in duty cycle that corresponds to the bumps in the VCOMP voltage.
    Stability of the control loop is ensured by selecting the correct components in the loop compensation network. If no opto-coupler is used these components will sit between the COMP and FB/EA- pins as shown in Figure 39 of the datasheet. If an opto-coupler is used with an external error amplifier then the compensation components must be added around the external error amplifier.
    The compensation network matches the speed of the control loop to that of the power circuit to ensure stable operation. Design of the compensation network must be done for the particular power stage and filter components used. It is a big topic so I recommend that you study the following book for details of how this should be done to match your particular power stage.
    "Fundamentals of Power Electronics" by Robert W. Erickson and Dragan Maksimovic.
    Thanks
    Joe Leisten