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TPS65910: About power-off at EEPROM mode

Tao_2199
Genius 5770 points
Part Number: TPS65910

Hello,

Regarding to power-off at EEPROM mode on TPS65910AA1, my customer is asking a question.

(Question)

･In this mode, does it need DEV_OFF or DEV_OFF_RST control bit for power-off?

According to datasheet page 47, these control bit are set to 1 for power-on disable.

But it seems that power-off sequence is started by falling edge of PWRHOLD on figure 5-2 (D/S page 39)

and figure 3 (User's Guide page6).

Is only PWRHOLD control needed for power-off at EEPROM mode?

 

Regards,

Tao2199

  • 0
    TI__Mastermind 30280 points

    Power-on disable conditions only prevent the device from meeting the "power-on enable" requirements.

    In other words, if the device is in the OFF state, the PMIC will not be allowed to go to the ACTIVE state if:

    • PWRON = low, OR
    • Die temp > thermal shutdown limit, OR
    • DEV_OFF bit = 1b,or DEV_OFF_RST bit = 1b

    But when the device is in the ACTIVE state, the only requirement to sequence-down and go to OFF/SLEEP states is to pull PWRHOLD pin low.

  • 0 in reply to Brian Berner
    Genius 5770 points
    Hello Brian,

    I got it and informed to my customer.
    Many thanks!

    Regards,
    Tao2199