Other Parts Discussed in Thread: TINA-TI,
Tool/software: TINA-TI or Spice Models
Peter:
I have been thinking to outsmart the claims of feeding a ramp to a current mode control model- just that I did not get around doing it until this evening.
Here is the trick: copy/paste the same example of UCC28c42 schematic. The first one is allowed its original current mode hook up. Disconnect the current sense connection from the second schematic- so we are setting it up to run in a "voltage mode". Set the second output load to 48 Ohms instead of 480 as in the first schematic.
Now feed the CS pin signal of the first one into the second schematic CS pin. This would be "equivalent" to running the second one in "voltage mode" because it is universally agreed that feeding a "suitable" ramp at CS pin instead of its own current sense signal makes such a circuit to run in v/m.
Voila.
Run the simulation.
Lo & behold, the second one will run EXACTLY as the first one- as if it was a "voltage mode". Note that the second output is 10 times higher current load than the first!!!!!!
Most intriguing point here is that the second circuit runs at all with 10 fold load current.
And now, I would like to put my hypothesis here: see, there is something in the model that completely screws up the current mode comparator associated circuit(in the model) IF THE RAMP CONTINUES beyond a level where there should have been a termination of the ramp. That is why no matter the scale, ramp at the CS pin never works.
I wonder if the real circuit would do the same! I have a haunch that it will! i.e., getting voltage mode by ramp is a false assumption.
Agree?
robin
BTW: pl see my request regarding Micro command in TINA-TI. HElp will be appreciated.UCC28C42_two.TSC
