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LP5569: About timing chart of 32kHz clock and I2C at Synchronization

Guru 21045 points
Part Number: LP5569


Hi Team,

 

We understand that LP5569 can synchronize multiple devices.

However, we can’t understand association of "32kHz clock" and " the data which were written by I2C".

Could you please let us know the timing chart of “32kHz” clock and “I2C of each devices” at synchronization if you have any information?

 

 

Regards,

Kanemaru

  • Hi Kanemaru-san,

    32khz is for synchronize the engine execution timing between the device. You can config one as the CLK out the others are CLK in. Then they share CLK of the engine.

    Thanks!

    Summer

  • Hi Summer-san,

     

    Thank you for your prompt reply.

    I understand that "32kHz clock" is unrelated to "I2C" so I can communicate to LP5569 by I2C regardless of “32kHz clock”.

    Is my understanding correct?

     

    Regards,

    Kanemaru

  • Hi Kanemaru-San,
    Your understanding is correct.
    Thanks!
    Summer
  • Hi Summer-san,

    Thank you for your prompt reply.

    I understand. Thank you very much.

    Regards,

    Kanemaru

  • Hi Summer-san,

     

    I have additional questions.

     

    ---------

    [Q1]

    LP5569 has three engines.

    Those engines can carry out the data which were written by I2C at the same time.

    Is my understanding correct?

    ---------

     

    [Q2]

    I understand that those engines are related to PWM dimming only.

    Is my understanding correct?

     

    Our customer would like to use the LEDx_CURRENT Register only for the dimming.

    (Then, they set PWM Registerx to 100% duty cycle.)

    Because, they need the DC dimming.

    ---------

     

    [Q3]

    We understand that if they use 4 LP5569s, they can control(dimming) 36 LED by “LEDx_CURRENT Register ” at the time.

    For example, the time lag of “LP5569-1_LED0(first LED) and LP5569-4_LED8(last LED) are arund 90us (1/400kHz).

    Is my understanding correct?

    ---------


     

    Regards,

    Kanemaru

  • Hi, Kanemaru-san,

    Please refer to my comments for your questions.

    [Q1]:

    As you can see from8.1.1, the three engines can work at the same time but more than one engine cannot simultaneously control the same LED driver output.

    [Q2]:

    The engines also include other instructions like wait, rst, int, which is about delay, reset, interrrupt, and so on.

    But you are correct to set PWM Registerx to 100% duty cycle and change LEDx_CURRENT Register for DC dimming.

    [Q3]:

    Since the 400kHz is the clock frequency, everytime you send LEDx_CURRENT Register value for one chip, you need to send (1 byte chip ADDR + 1 byte register ADDR + 1 byte register value)*9 = 216 bit, which takes around 216*(1/400kHz)=540us. So the total time for sending four chips is around 2ms.

    This is the worst case, and if you use auto-increment, the time will be less.

    Please let me know if this solves your problem.

    Thanks.

    Regards,

    Kenneth

  • Hi Kenneth-san,

    Thank you for the information.

    I understand. Thank you very much.

    Regards,

    Kanemaru

  • Hi Kenneth-san,

     

    Thank you always for your kind support.

    I have additional question.

     

    --------

    [Q4]

    I understand that it is reflected immediately if "Resister" is changed by I2C.

     

    <For example>

    “LED1_CURRENT Register” is changed from “AFh = 17.5 mA” to “FFh = 25.5 mA”.

    Then, LED1 current is changed immediately (there is not the time lag).

     

    Is my understanding correct?

    --------

     

    [Q5]

    I understand that the internal engine can’t control “LEDx_CURRENT Register”.

    So, we can’t get the synchronization of " LEDx_CURRENT Register " even if we connected 32k clock to other LP5569.

     

    < Background >

    Our customer would like to remove the following time lag.

     

    >Since the 400kHz is the clock frequency, everytime you send LEDx_CURRENT Register value for one chip,

    >you need to send (1 byte chip ADDR + 1 byte register ADDR + 1 byte register value)*9 = 216 bit, which takes around 216*(1/400kHz)=540us.

    >So the total time for sending four chips is around 2ms.

    --------

    Regards,

    Kanemaru

  • Hi, Kanemaru,

    For your [Q4], your understanding is correct.

    For [Q5], if customer want to sync all devices to same " LEDx_CURRENT Register " configuration, they can use 40h as the chip address and enable auto-increment function, then the total time lag for four chips at 400kHz will be (1 byte chip ADDR + 1 byte register ADDR + 1 byte register value*9 = 88 bit)*(1/400kHz)=220us.

    If customer needs to sync all devices to different configuration, using auto-increment, the time will be 220*4=880us. 2ms is the worst case for different configuration and not using auto-increment.

    Please let me know if this solves your problem.

    Thanks.

    Regards,
    Kenneth

  • Hi Kenneth-san,

    Thank you for the detail information.

    I understand. Thank you very much.

    Regards,

    Kanemaru