Hi,
We got a question from the customer about TPS61021A.
Could you help us?
[Question]
How much is the EN start-up and shutdown delay time?
They are considering the output discharge circuit. Is there any recommneded circuit?
Best Regards,
tateo
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Hi,
We got a question from the customer about TPS61021A.
Could you help us?
[Question]
How much is the EN start-up and shutdown delay time?
They are considering the output discharge circuit. Is there any recommneded circuit?
Best Regards,
tateo
Hi Tateo,
I'm back. Sorry for the delay. En delay during startup is around 150us. EN delay during turn-off is very short, only several us. and the Vo drop time is depend on the output cap and the load current.
What is the discharge time requirement in your application?
Hi, Thank you for your reply. When EN is turned off, if the discharge FET is turned on before the IC is shutdown, the load current will increse. They want to ensure the discharge FET is turned ON after the IC is shutdown. Is there any solutions?
Best Regards,
tateo
In fact from EN low to IC turn-off delay is very short, within several us. that is once EN is low, the low side FET and the high side FET will trun off immediatelly. so the increase of the load current at that time has no effect to the IC. they can also add some RC delay to the discharge FET if they worried about the timing issue.