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TPS40200: TPS40200 synchronization to external clock

JosefMieslinger
Intellectual 2170 points
Part Number: TPS40200

Dear Team,

my customer uses TPS40200 and wants to synchronize the device to an external clock.

The datasheet specifies the following requirement:

The maximum amount of time that the RC pin should be held low is 50% of a nominal output pulse, or 10% of the period of the synchronization frequency

whichever is less.“

Can you please clarify what "nominal output pulse" means exactly?

Thanks and best regards,

Joe

 

  • 0
    TI__Expert 4100 points
    Hello,
    Requirements for external synchronization are described in datasheet section 7.3.4.
    Also user guide for device EVM describes how is external synchronization applied.
    See link below
    www.ti.com/.../slvu147c.pdf

    Regards
    Brani
  • 0 in reply to Brani Dubocanin
    TI__Intellectual 2170 points
    Hi Brani,

    thanks for your answer.
    The statement above "The maximum amount of time that the RC pin should be held low is 50% of a nominal output pulse, or 10% of the period of the synchronization frequency whichever is less.“ has been extracted from the datasheet section 7.3.4.
    For us it is not quite clear what the "nominal output pulse" is referring to. Is this the nominal duty cycle of the GDRV signal?

    The example in the sluv147c.pdf shows a synchronization signal with 50% duty cycle, which violates the "max 10% of the period of the synchronization frequency" requirement. So this makes it even more confusing.

    Can you please answer the question above and give us exact details about the requirements for the synchronization signal for this device?

    Thanks and best regards,
    Joe
  • 0 in reply to JosefMieslinger
    TI__Expert 4100 points
    Hi Joe,
    We are checking with product team on your question and will get back to you as soon as we have an answer.
    Thank you
    Brani
  • 0 in reply to Brani Dubocanin
    TI__Expert 6860 points

    Joe,

     

    Nominal output pulse means the On time of the PFET . This can be calculated as (vout/(Vinmax*Fsync)). So the on time of the FET connected to the RC pin (ie the rime the RC pin is held low ) for Synchronization  should be less than  0.5*(vout/(Vinmax*Fsync)) or 0.1 /Fsync whichever is less .

    Hope this helps .

     

    --Ambreesh