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TPS62170: staircase shape in the startup waveform

Part Number: TPS62170

During the startup of the chip, I captured Vout (yellow), Vin(green), Enable (orange) and PGood (purple) at the 0.2A load condition. The voltage level, timing and everything looks good. But Vout waveform has some staircase shape in the rising slope. I have seen some other chips doing this too during startup. Can someone please help explain why this happens and provide some mitigation strategy? Thank you very much!

  • Hi Di,

    This app note (though from a different device with a different control topology) explains the common causes of this behavior: www.ti.com/.../slva866.pdf Compared to the waveforms in the app note, yours look pretty good I think. Is this a problem for your application?

    To summarize, the very first few switching pulses deliver more energy than required by the load and output cap, due to their minimum on time. Thus, Vout rises faster than the (internal) SS ramp. Thus, there is a gap before the next pulse occurs as the SS ramp catches up to where Vout is.

    Is your 200 mA load applied in the above waveforms? Is it from an electronic load? In many cases, the electronic load isn't drawing any current during the startup ramp, as it responds too slow.
  • Thank you very much, Chris!