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TPS92641: Is the switch between EA and COMP terminal open when SDIM=L?

Kazuya Nakai59
Guru 21615 points
Part Number: TPS92641

Hello guys,

 One of our customers is evaluating TPS92641 using their own PCB for light source application of their new products. They refer to PMP8016 schematic and layout. Their parts parameters are almost same as PMP8016.

 PMP8016(Single LED with High Current 20A Application using TPS92641)

http://www.ti.com/tool/PMP8016

 Also their input voltage is 12V, output current for LED is 20A, LED color is green and the LED Vf is about 3.2V. The number of LED in series is one.

 And they are controlling SDIM input signal for LED turning on/off not UDIM because they need high speed LED on/off control. 

 They found un-stabled voltage waveform on COMP terminal as the attached one when SDIM = L level (LED is in off state).

 Could you please take a look the attached waveform and please give me your idea what the reason of the COMP votage waveform is?

 Also could you please give me your answer for the following questions?

1. According to the function block diagram on page 10 of TPS92641, a switch controlled by PWM_DIM signal is inserted between EA and COMP terminal.

   Is the switch open when SDIM=L? Or is the switch on/off not controlled by SDIM signal?  Is the switch always on not depends on SDIM H/L level?

2. If the switch is open (COMP is floating) when SDIM=L, is it effective to insert a high value resistor (ex.1Mohm) between COMP-GND for votage stabling and lower voltage keeping?

3. Can we buy or borrow PMP8016 board from TI?

4. Do you have any voltage waveform of switching node, COMP terminal, HG,LG and inductore current when SDIM=L level?

 Your reply would be much appreciated.

 Best regards,

 Kazuya Nakai.

  • 0
    TI__Mastermind 25500 points

    Hello Kazuya,

    What PWM frequency are you using on SDIM? I would expect COMP to change some between the two states but not likely that much. However, 2.2nF is a pretty low value and possibly used so that current can slew fast with changes in IADJ. If you do not need that you might be better off increasing COMP to 0.1uF and see if the oscillation goes away. I am not sure how this design was tested initially. But to answer your questions:

    1. COMP is only disconnected when using UDIM. SDIM will keep it connected as you are still regulating output/inductor current while the shunt FET is on.

    2. It stays connected, but I would try a higher cap value as I said above.

    3. I don't think any are available at this point. But gerbers are provided so it should be easy enough to fabricate your own.

    4. I don't have any waveforms unfortunately. But as mentioned in the datasheet the inductor/output current is still regulated. The switch node will show minimum on time pulses with the off time adjusting so that current is still regulated. That would be reflected in HG and LG.

    Regards,

    Clint

  • 0 in reply to Clinton Jensen
    Guru 21615 points

    Hello Clint,

    Thank you very much for the prompt reply.

    The customer changed the capacitor located between COMP-GND from 2.2nF to 0.1uF. As the result, COMP voltage was stabled like No.1 waveform in the attached excel file.

    After that, the customer changed SDIM level from L to H. then LED current went up to about 40A not 20A set by IADJ

    terminal(VADJ=1.98V). When RED LED is connected to same board, then the LED current is controlled to 20A.

    Do you have any idea why the LED current become such large current and the current is stopped after exceeding 40A?

    Do you think the VADJ is too high for 20A driving?

    Rcs on the customer's PCB is 7.5m ohm. If LED current is 20A, CS average voltage is about 150mV. In my understanding, this CS voltage is compared with COMP voltage by Fsw comparator. So I would think the COMP voltage in No.1 and No.2 wavefore is too high. Is my understanding correct? Whai is typical COMP voltage when SDIM=H?

    Also their target minimum SDIM pulse width is about 100us. Does PMP8016 have  the capability?

    Could you give me your comments?

    Thank you very much again and best regards,

    Kazuya Nakai.        

    /cfs-file/__key/communityserver-discussions-components-files/196/1727.COMP_5F00_Waveform042718.xlsx

  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 25500 points

    Hello Kazuya,

    The current should not depend on the COMP cap value and this device should be easily capable of 100us pulses. The 640 could do it pretty well without the shunt FET, but that depends on if you have rise/fall time requirements as it wouldn't be as fast. But if you have 2V on ADJ the current sense voltage would be 200mV and the average current would be set near 27A. Depending on your switching frequency you could be saturating the inductor. That would cause the current to rise out of control until it hits current limit and shuts off. With that ADJ voltage you should have a 10mohm current sense resistor. If you need higher current you may need a higher current inductor.

    Regards,

    Clint

  • 0 in reply to Clinton Jensen
    Guru 21615 points

    Hello Clint,

    Thank you very much for your reply and I'm sorry for my late response because I took a long vacation.

    The inductor peak current the customer using is 71A. Also they checked the LED current (=inductor current) but any current saturation (the phenomenon that the current is increased rapidly) is not observed.

    The LED current increasing rate is linear.

    Could I ask you a few additional questions?

    1.  I think that 1.28V between VIN and SW terminal voltage is needed to hit the current limit threshold when HG=H level. Is my understanding correct?

    2. How long this condition is needed to keep to hit the current limit? 100ns? 50ns?

    3. Is there possiblity that any noise occurs the current limit protection?

    4. Is there any way that we know whether the device switching is stopped by the current limit protection?

    5. As the No.2 waveform in the attached file, HG switching is stopped by any cause. Do you have any idea what the cause is?

    /cfs-file/__key/communityserver-discussions-components-files/196/7853.COMP_5F00_Waveform050718.xlsx

    Thank you very much again and best regards,

    Kazuya Nakai.

  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 25500 points

    Hello Kazuya,

    1. That is correct.

    2. It should be the minimum on time, which is 235ns. After that it should be sensed and activate.

    3. If there is noise past 235ns due to layout or some other source then it is possible noise could trip current limit.

    4 and 5. This is described in the datasheet section "Overcurrent Protection".

    Regards,

    Clint

  • 0 in reply to Clinton Jensen
    Guru 21615 points
    Hello Clint,

    Thank you for the prompt reply.
    About 5, if the cause of switching stop is overcurrent due to any noise, is there any countermeasure to avoid the overcurrent occurring? Is it effective to attach a ceramic capacitor between VIN and SW terminals?

    Thank you again and best regards,
    Kazuya Nakai.
  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 25500 points

    Hello Kazuya,

    If the layout is good there should not be noise tripping the current limit unless you are trying to run right at the edge of current limit during normal operation. A cap from VIN to SW would likely blow up due to the rapid charge/discharge and it could cause issues. If you think you have a layout issue I can check, but normally you are fine if you aren't running near current limit during steady state.

    Regards,

    Clint

  • 0 in reply to Clinton Jensen
    Guru 21615 points
    Hello Clint,

    I will check whether the customer want TI to check their PCB layout or not.
    But they'd like to solve the overcurrent detection issue without the current PCB layout change to build up a few demo model as soon as possible.
    Do you think a snubber circuit connection between VIN and SW is effective for noise reducing which occurs the overcurrent detection?

    Thank you and best regards,
    Kazuya Nakai.
  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 25500 points

    Hello Kazuya,

    A snubber could help with SW pin noise for sure. But I would put it from SW to ground rather than SW to VIN so that you are not injecting noise to the input pin.

    Regards,

    Clint

  • 0 in reply to Clinton Jensen
    Guru 21615 points

    Hello Clint,

    Could you please take a look the attached waveform our customer observed on their own PCB board and please give me your idea for my questions?

    Thank you and best regards,

    Kazuya Nakai.

    /cfs-file/__key/communityserver-discussions-components-files/196/3755.TPS92461Waveform051518.xlsx

  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 25500 points

    Hello Kazuya,

    Are you using PDIM and SDIM, or just SDIM? Do you have long leads between the converter output and the LEDs? Is there any output capacitance on your circuit?

    Thanks,

    Clint

  • 0 in reply to Clinton Jensen
    Guru 21615 points
    Hello Clint,

    Thank you for your reply.
    They are using just SDIM only for dimming not UDIM(PDIM?). The wire length between the converter output and LED is about 10cm. One 0.1uF ceramic capacitor only is connected between 1uH inductor and current sense resistor (= LED anode and cathode).

    Do you have any idea why the longer on time of SW terminal (=high side NMOS FET is kept on longer than the calculated switching frequency) is generated just after SDIM goes high (= shunt FET is off)?

    Thank you again and best regards,
    Kazuya Nakai.
  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 25500 points

    Hello Kazuya,

    It's hard to say without a lot more information. But this device will turn the high side switch on longer if/when needed to reach the correct regulation level if the CS voltage is too low. It's possible that this (and maybe even current limiting) is due to using an output capacitor. With shunt FET dimming it is really best not to. Have you tried it without the output capacitor? Due to I=Cdv/dt the peak currents produced by an output cap can be huge and cause issues, even with only 0.1uF.

    Regards,

    Clint

  • 0 in reply to Clinton Jensen
    Guru 21615 points
    Hello Clint,

    Thank you for your reply. We will check the board operation without the output capacitor. But I think the shunt FET has a capacitance between Source and Drain. If the capacitance value is big, can the FET be not used for shunting?

    By the way, in PMP8016 evaluation, could SDIM function be used without any problem?

    PMP8016
    http://www.ti.com/tool/PMP8016

    Thank you again and best regards,
    Kazuya Nakai.
  • 0 in reply to Kazuya Nakai59
    TI__Mastermind 28655 points
    Hello,

    Does your driver regulate current without shunt FET dimming?
    What is Vout before SDIM goes high?
    Why is the current zero when SDIM goes high?

    Regards,