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LP8863-Q1: What is the minimum waiting time to get a consistent result from status register when Vdd / En goes from Lo to Hi?

Kai Chuan Wong
Prodigy 145 points
Part Number: LP8863-Q1

Here's the scenario. My LED cable has been disconnected completely, in order to trigger a OPEN LED fault all the time. I perform a reset by toggling Vdd / En from Hi - Lo (wait 100ms of no activity), followed by a Lo - Hi and wait another 100ms of no activity. After which, I do a status register read.

Problem is - when I read back from the status register, the OPEN_LED fault is not set sometimes. When this happens, I repeated the above reset sequence and read again.

About 50% of the time the interrupt status 2 register is reading 0xfe80, this is OK. The other portion of the time it's reading back 0x0000, this is NOK.

I have also tested with various timing of waiting time when Vdd / En is Hi. The most stable time I can get is 2s. Even at 1.8s I still get 1-2 error in 30 minutes.

Why is this so? Is there any solution to ensure the status result is read back correctly?

  • 0
    TI__Intellectual 2180 points
    Hello,

    I will look into your request shortly but have some initial questions to clarify.

    1. Are both VDD pin and EN pin set low/ high during the test? at same time or different timing?
    2. What about VDDIO is this kept high or also goes low/high with VDD and EN pins?
    3. Just to clarify, all LED channels are left open during testing?
  • 0 in reply to Salome Ramirez Carrion
    Prodigy 145 points

    Hi, thanks for looking into it.

    1. EN Hi/Lo, followed by Vdd Hi/Lo, no delay in-between. You can say they are Hi/Lo at the same time

    2. VDDIO isn't changed throughout the test

    3. LED channels are left open throughout the test.

    Here are some extra information:

    In "error":

    Status 1 = 0x0080

    Status 2 = 0x0000

    Status 3 = 0x0800

    In "correct":

    Status 1 = 0x0000

    Status 2 = 0xFE80

    Status 3 = 0x0800

  • 0 in reply to Kai Chuan Wong
    TI__Intellectual 2180 points

    Hello,

    What might be happening is that the device is not starting up correctly due to not enough time allowed in between VDD high and EN high.

    VDD needs to be above POR level ~2.65V for device initialization to begin, in which device loads EEPROM settings and LED string configuration is detected among other internal blocks being set. Only after device initialization has finished, EN pin should go high to allow boost start-up sequence to continue. If there is not enough time between VDD high and EN high, then the device might not start correctly, including improper detection of LED configuration or/and incorrect EEPROM loading. Recommendation is to allow >500us in between VDD high and EN high.

    One other to keep in mind is that only after LEDs are active will the device be able to detect LED faults. LEDs are active after Boost softstart has finished, which is >100ms from VDD High. And note that BSTOVP fault could be set during and open led event due to overshoot when boost ramps up to Vboost max. 

    You can refer to section 8.4 of the datasheet for more details on the functional modes of LP8863-Q1. 

    Hope this helps.

  • 0 in reply to Salome Ramirez Carrion
    Prodigy 145 points
    Hi,

    I have test Vdd Hi -> wait 100ms -> En Hi, but no change in result. Do try on your side to see if you are able to replicate the problem.

    I am quite curious about BSTOVPH - if this was set, will OPEN_LED fault still be set? It seems 'no' to me as from the state diagram it have entered into the FAULT_RECOVERY path and will stay there until the fault is solved.
  • 0 in reply to Kai Chuan Wong
    TI__Intellectual 2180 points
    Hello,

    I've tried replicating this test on the LP8863-Q1 EVM but not able to get an BSTOVPH fault. I've done several tries with different timings for VDD and EN high/low but still consistently seeing OPEN_LED faults only.

    Are you testing this on own board or on the EVM? If so, are the results repeatable in multiple systems? with multiple devices?

    If you can could you please provide a screenshot showing VDD, EN signal and Vboost during the test?

    Thank you.
  • 0 in reply to Salome Ramirez Carrion
    Prodigy 145 points

    Hi,

    My test runs on my own board. It's repeatable in all those boards I have tried.

    I wasn't able to capture the screenshot, but I went to read the ADAPT_BOOST_DIAGNOSTICS register. Hope it helps.

    When OK, it reads 0x7FF

    When NOK, it reads 0x6F5

    The values are always fixed, as didn't see any change for a few rounds.

    *p.s. I need to read fast after a reset to detect the problem, like 100ms after a Vdd is Hi.

    *p.s. I got BSTOVPL fault, not BSTOVPH. I didn't rely on the INT - just read the status registers directly.

  • 0 in reply to Kai Chuan Wong
    TI__Intellectual 2180 points
    Hello,

    Seems like boost is not reaching max Vout level during NOK cases. This is why ADAPT_BOOST_DIAGNOSTICS reads lower voltage than max (0x7FF) and why BSTOVPL is set, since the adaptive boost is lower than what the target should be, which for an all open LED fault case should be Vout max level set by FB resistors.
    It's not clear why this is happening but I wonder if it is related to external circuitry, i.e. FB network. I have send you a friendship request so we can continue this conversation internally since I would like to check schematics at this point if possible. Please accept request for further support.
    As of now, I will close this thread.

    Thank you.