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RE: TINA/Spice/UCC28C42: UCC28C42

Other Parts Discussed in Thread: UCC28C42

Nikhil

I think finally, I may have come upon the ramp that  appears to make the uCC28c42 run in voltage mode.

Appears. Do not know if it is so indeed.

Pl see attached file.

In a word or 2: the ramp one is so accustomed to being told to add at the CS pin must be a symmetric  ramp not a saw tooth. What all controllers have for "ramp" is a sawtooth waveform. If you apply any fraction of this at the CS pin, the behavior is pretty predictable: the  gate dr latch is reset at the peak & it is set back on  at the 0 level of the sawtooth- giving the characteristic 99.9% duty waveform at the gate dr.

You change it to a symmetric triangular waveform, then  gate dr output will look like getting controlled correctly.

However: there is still a problem. You will notice that the gate drive output is  in bursts. I could not get it to be continuous. Again, this is typical of instability in voltage mode operation.

I am wondering if you can address the issue of how to make it continuous noit  bursts & be stable.

UCC28C42_STEADY3rd.TSCThanks.

  • Hi Robin,

    I think this question would be more appropriate on the product forum. I will move it there as a separate question.
  • Nikhil:
    thnx for putting this up in the product forum: & I suppose this is where I am now.
    After all I have stated so far on the voltage mode operation per Figure 28 in the data sheet, I still find that the explanation for v/m with a 1v ramp fedback at the CS pin sounds logical BUT IT SIMPLY WONT WORK in the model. The "triangular" waveform trick I mentioned earlier, is really not a guaranteed trick to work as v/m- clearly because the amplitude cannot be 1V if we are deriving the triangle from the RTCT ramp.
    So then, question is : will it work in an Eval board implementation? If so, can I get hold of one just to test it in real circuit?
    Let me know.
    robin