Tool/software: WEBENCH® Design Tools
The simulation ans schematic generation of the TPS61030 and 2 act super strange. A cap is unconnected and the simulation is totally wrong when i run it with initial values.
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Tool/software: WEBENCH® Design Tools
The simulation ans schematic generation of the TPS61030 and 2 act super strange. A cap is unconnected and the simulation is totally wrong when i run it with initial values.
Hi Thomas,
The issue of broken output capacitor is resolved now but you will see the latest updates on ti.com in our next release.
For the case Vinmin:2 ; Vinmax:3.2 ; Vout:5 ; Iout:0.5, the current limit is being hit. The device cannot start at full load initially due to lower current limit during startup. FYI the below image for more information on current limit.
We have an alternate testbench called 2-Step startup where initially low load is pulled until Vout is settled.
Below is the snapshot for your reference.
Thanks and Regards,
Kiran Kumar
Hi Thomas,
The release is yet to happen. you will be able to see the latest updates by this weekend.
You cannot run any other testbench other than startup once you edit the schematic.
To check all the testbenchs, please follow the below procedure.
1. Once you create the design,first click on "Sim tab" where you can run all the testbenches as highlighted below.
Thanks,
Kiran Kumar