LP5907: Bode Plot

Hi Tateo,

There no possible injection point external to the LP5907 for making bode plot measurements. Are you asking for design simulation results?

Hi, Thank you for your reply. Yes, they are asking for design simulation results. Could you provide the data?

Best Regards,
tateo

Hi Tateo-san,

The LP5907 has 36.2 degrees of Phase Margin at the following conditions:
Vin = 3 V, Iload = 250 mA, -40°C with Cout = 1 uF and 5 mohms ESR.

-40°C is worst case temperature for phase margin, so the phase margin will increase for warmer temperatures.

Hi, Thank you for your reply.

- How much is the band width? If you provide the plot of loop gain and phase, it would be very helpful.

- If they want more phase margin(>45deg), is there any solution? Increasing the capacitanse of the output capacitor is right solution?

Best Regards,
tateo

Hi Tateo-san,

I will ask about bode plots and bandwidth for LP5907.

Do many customers consider > 45 deg of phase margin is required for stability? 45 degrees of phase margin is not required for stability. The LDO output will exhibit some ringing with less than 45 degrees of phase margin, but will still maintain control of the loop and damp the oscillations. With 28 deg of phase margin, you will get about 4 rings and 35 degrees of phase margin will result in about 3 rings.
See this app note: www.ti.com/.../slva381b.pdf

Do customers see issues with their boards when the LDO has a few rings during a load transient?

HI Tateo-san,

Bandwidth is about 3 MHz.