LM5166: Turn off and doesn't come back without powercycle

Christoph,

It's strange that the IC would stop regulating but it would recover after a power cycle. And even more strange that the new layout made it more robust, but not robust enough.

Can you trigger this issue, then check the voltages and waveforms on each pin of the IC while the IC is not regulating? Could some external circuitry be pulling SS or EN low?

-Sam

Sam,

On the SS pin we only have a capacitor, so nothing can be pulling the pin low.

The EN pin could get pulled low, but we already checked that and it stays at about 1,5V.

When the Ic stops regulating all pins that I checked to the following:

• EN ... stays at 1,5V
• SW ... Open (both internal FETs are open)
• FB ... Drops with output voltage till the output voltage reaches about 5V
• PGOOD ... stays high till FB drops below 87% and than turns low
• RT, HYS ... are connected to GND
• SS ... Not checked yet, but under normal operation this voltage is about 3V.
• ILIM ... Not sure what the signal at this pin is supposted to look.

The reason the ouput only drops to 5V is, that there is a 8k2 resistor to a voltage of about 5.3V. We have a voltage that is supplied by this IC and a LDO for startup and shutdown reasons.

Since the issue is seldom on our working bench we tried to force it to happen. The high noise on the signals in the following picture is a result of that:

C1 ... Input for our driver, C4 ... FB, C6 ... Output and C8 ... PGOOD

Here you can see the behaviour of the IC when the issue occurs. As can be seen in the behaviour of the pgood, the reason is not the SS pulling low, since that wouldn't result in the pgood signal to drop at 87% output. I tested that with the evaluation board. The pgood of the evaluation board decreases with the main output when SS is shorted and stays low after the short is removed, till the output is within the range again.

Also the behaviour of the pgood suggestes, that there is no pulling low if the EN since this would result in the pgood dropping much faster as tested previously on the evaluation board. (Anyway we measured the EN and it remains at 1.5V)

Christoph

HI Christoph,

Please forward the schematic and PCB layout for review. Are the feedback resistors placed close to the FB pin?

Regards,
Tim

Hi Christoph,

Just following up on this thread - did you solve the issue? Keeping the feedback resistors close and tight to the FB and GND pins is critical.

Regards,
Tim

Hi Tim

The feedback resistors are as close to the FB and GND pin as possible. RFB2 is in the same possition as on your evaluation board and instead of 1 RFB1 we have 2 resistors in series in a similar possition os CB and RFB1 on your evaluation board. I decreased the loop between the IC and the output capacitor to be the same as on the evalutation board after first finding this issue. This did resolve the problem on my workbench but not when we use the LM5166 as the powersupply for our FET-drivers in the actual converter (a dc-ac converter with 750V input and 400ac 3-phase output).

Also we only get this behaviour when we actually have a switching load. On my workbench this is a switched RC load to simulate the gate drive losses of the used FET. But this switched RC-load has a different behaviour than the converter FETs. So solving this problem on my workbench did reduce the likelyhood of this issue in the converter, but not solve the problem.

Regards,
Christoph

Hi Christoph,

Is the PCB layout available?

Regards,
Tim

Hi Tim,

Of course the PCB layout is available. If you would accept my friendship request, I could send you the layout and schematics of the LM5166 part by means of a private message.

Regards,
Christoph