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TPS65217: PB_IN Falling Edge?

Paul Richards
Prodigy 205 points
Part Number: TPS65217
Other Parts Discussed in Thread: AM3352

Hi,

We have a design based on the AM3352 and TPS65217C PMIC. We a non-battery, 5V regulated supply and are providing this supply through VBAT as per option 3 of 10.2.2.2 of the TPS65217 datasheet.

A number of descriptions in the datasheet specifically describe a requirement for a falling edge on PB_IN as a trigger for initiating the power on sequence, e.g.

9.3.3 Push-Button Monitor (PB_IN)
The TPS65217 device has an active-low push-button input which is typically connected to a momentary switch to ground. The PB_IN input has a 50ms deglitch time and an internal pullup resistor to an always-on supply. The push button monitor is used to:
• Power-up the device from OFF or SLEEP mode upon detecting a falling edge on PB_IN.
• Power cycle the device when PB_IN is held low for > 8 s.

In absence of AC or USB inputs we understand that PB_IN is the only way to initiate the startup sequence from power off.

I would like to confirm whether a falling edge of PB_IN is necessary or whether it is sufficient to hold PB_IN low at initial supply of VBAT.

Thanks,

Paul

  • 0
    TI__Mastermind 49171 points
    Hi, Paul,

    Thank you for your interest in our products. An expert has been assigned to answer your question.

    Best Regards!

    Phil Yi
  • 0
    TI__Mastermind 30310 points
    Paul,

    A falling edge is required. The PB_IN pin is edge-sensitive. The only pin that is listed as level-sensitive in the TPS65217 datasheet is the PWR_EN pin.
  • 0 in reply to Brian Berner
    Prodigy 205 points
    Hi Brian,

    Thanks for the quick response.

    Sorry, I should have mentioned that our testing seems to indicate that (in this configuration at least) the initial grounding of PB_IN causes the power on sequence shortly after VBAT is applied. If left unconnected (and consequently pulled high internally within the PMIC) then it seems the falling edge is subsequently required as per the datasheet.

    I'm wondering if this behaviour is something we can rely on?

    Paul
  • 0 in reply to Paul Richards
    TI__Mastermind 30310 points

    Paul,

    There is another item you need to consider when connected PB_IN directly to GND:

    If PB_IN is low for >8s, the TPS65217 PMIC will reset (power-down and power-up again after 1s). This will occur in a loop every 9 seconds.

    If you know of a way to connect PB_IN to GND during the initial power-on sequence and then release it high before the 8s timer expires, then I will look more into the architecture of the PB_IN input to determine if this is a reliable option for your design.

  • 0 in reply to Brian Berner
    Prodigy 205 points

    Hi Brian,

    Thanks. I think we can modify our current supervisor circuit to avoid the 9 sec power down / up cycle. If the PB_IN reliably supports being grounded for startup, I believe we'd prefer this option.

    Paul

  • 0 in reply to Paul Richards
    TI__Mastermind 30310 points

    Paul,

    It is clear to me that the hardware of the PB_IN pin can detect levels and only the digital logic of the state machine requires edges for certain transitions.

    When powering on for the first time from the POWER DOWN state, any input power will enter the OFF state. Exiting the OFF state is allowed is PB_IN == 0 during the initial power-on.

    However, edges will be required to make a transition from PRE_OFF or SLEEP states back to ACTIVE. This is important because if the OFF bit = 1 & PWR_EN = 0 then the PMIC enters PRE_OFF. If AC || BAT are still high, the PMIC cannot transition to OFF unless power is completely removed on both AC && USB. To transition to ACTIVE from PRE_OFF, an edge on PB_IN or the other line power supply (AC or USB) is needed.

    I did test to confirm that when PB_IN is held low during start-up it generates an interrupt and the Status bit indicates the Push-Button is pressed:

    Please read the Global State Diagram (Figure 24 on page 39) in the TPS65217 carefully and make sure that this functionality will work correctly in your system.

    Thanks,

    Brian

  • 0 in reply to Brian Berner
    Prodigy 205 points

    Hi Brian,

    Thanks very much for this, very helpful and much appreciated.

    We'll carefully review the transitions around PRE_OFF to make sure now issues.

    One last clarification if you wouldn't mind, in our scenario where since we're supplying only BAT and neither AC nor USB (case 3 of p.77), would we transition back to OFF when PB_IN is de-asserted? (Although it looks to be a moot point regarding PB_IN as we'd still need a falling edge to begin the transition towards ACTIVE again.)

    Regards,

    Paul

  • 0 in reply to Paul Richards
    TI__Mastermind 30310 points

    Paul,

    If AC and USB are both connected to GND, as the TPS65217x Schematic Checklist suggests to do when AC and USB are un-used, then the PMIC will be able to transition from the PRE_OFF state to the OFF state if PB_IN is de-asserted (high logic level). But as you have already pointed out, if PB_IN needs to be high to get to the OFF state, then you will need an transitional edge to get PB_IN to be low, so the point is indeed moot. PB_IN must be high when the device is ACTIVE, and must go low to get back to the ACTIVE state from PRE_OFF or OFF before PB_IN returns to the high level again.

    The connections of AC and USB to GND are also shown in Figure 62, titled Case (3), on page 77 of the TPS65217 datasheet. In addition, please make sure you connect TS pin to GND through a standard 10k resistor (not an NTC), so the PMIC will always detect that the "battery" temperature is within the allowable boundary conditions.

  • 0 in reply to Brian Berner
    Prodigy 205 points

    Hi Brian,

    Ok, that all makes perfect sense. Points noted re: tying AC and USB to GND, and TS via the 10k resistor.

    Thanks again,

    Paul