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UCC28780: Which equation for Lm?

Part Number: UCC28780

I'm using the MathCad worksheets in sluc644 to design a power supply.  In the "ACF Power Stage..." worksheet there is an equation for LMmax which doesn't match the data sheet equations (22) and (23) for Lm.  I get about a 30% difference in Lm from the worksheet version compared to the data sheet version.  The worksheet has a clever method of iterating to find the right kres, which I'm doing for each version of the Lm equation.

I can understand the derivation of the data sheet equation, but the worksheet equation is not clear to me.  Which should I be using, and why?  There is a big difference between them.

Thanks for any help.

  • Hello Gerrit,

    The two equations are actually rooted in the same concept: total switching period = primary on-time + secondary demagnetization time + resonant ring time. However, each equation is derived from this concept somewhat differently. And, in both equations, we are neglecting a very short interval of rise time from lower MOSFET turn-off to upper MOSFET turn-on.

    To make a long story short, the datasheet (DS) equation is based on an ideal Transition-Mode timing (also known as Critical Conduction Mode or Boundary Mode), where Lm is found from Pout, efficiency, minimum frequency, minimum bulk voltage and reflected output voltage. This Lm is modified by an estimate for the additional resonance interval (Kres) from top MOSFET turn-off to bottom MOSFET turn-on, which is not negligible. Kres represents the duty cycle of the resonant interval of the total switching period (inverse of f_min). In the DS, Kres is suggested to be taken as 0.05~0.06 as a quick, crude guess at the interval, and this should work reasonably well for lower-frequency Silicon-based power stages. Actually the Kres estimate should be increased to ~10% when designing higher frequency GaN-based power stages, since the resonant interval has proven to become a larger portion of the overall period at high frequencies.

    The Mathcad worksheet equation, on the other hand, is derived from the same ideal TM equation but with the terms rearranged into the standard quadratic formula ax^2+bx +c=0 and solving for x, where x = sqrt(Lm_max) and c = t_max(ideal) (inverse of the ideal minimum switching frequency). The a and b terms involve the power, voltages and the effective Coss factors.

    I recommend that you use the worksheet equation to calculate Lm because I believe that it is from a more rigorous derivation and its result is closer to the ideal value for the given targets (Pout, Fmin, etc). The process to use it is suited to the MC worksheet; however, it is too complicated to put into the datasheet, hence the simplification.

    I do not expect a difference of 30% between the two, however, and I must ascribe such a difference arising from inadvertently entering different numbers into the parameter terms. Common terms of the equations are Po/n = Px, Vbulk(min) = Vbulkmin, Nps*(Vo+Vf) = Vrfl, fsw(min) = 1/tswmax. These should be identical numbers. Kres of the DS is estimated; kres of the worksheet is iterated. The MC worksheet also includes Cswntr and kzmax terms. (Kzmax is only valid when Vbulk < Vrfl. It does not work if the bulk voltage is higher than the reflected voltage.)

    Other source of difference: The DS equation yields a nominal result for Lm. The worksheet equation, after iteration, yields a maximum value for Lm. This is then converted to nominal value by adjusting for a 10% tolerance on the inductance. Comparing nominal DS Lm to maximum MC Lm can instantly show a potential 10% difference, aside from any other discrepancies.

    I hope this helps you to understand each equation better and to find the discrepancy between your results.

    Regards,
    Ulrich
  • Thank you again for the excellent complete reply, Ulrich.

    I found I had to modify the kzmax equation some time ago for my situation (Vbulkmin > Vrfl), so kzmax is being set to 1.  Am I doing that right?

    I am doing the kres iteration for both the data sheet and the worksheet Lm equations, rather than using the DS recommendation of kres = 5% to 6% (of something unclear).  I am iterating kres until the delay values shown are equal ("OK when equal"), and kres ends up about 0.2 in either case.  I just noticed that the iteration uses LMmax, however, not nominal, so perhaps this isn't correct with the DS equation.

    Please let me know if kzmax = 1 is the right number when Vbulkmin > Vrfl.  I think I will simply use the worksheet equation as you recommend, as long as I have kzmax right.  That comes out with a lower Lm anyway, which I like to see.  :-)

    Regards,

    Gerrit

  • Hello Gerrit,

    I'm not sure what to do about kzmax when Vbulkmin > Vrfl. I think it can become more complicated than simply setting it to =1, depending on how much greater Vbulkmin is than Vrfl. I'll have to think deeply about that, which I wish I had more time to do.

    Meanwhile, I suggest that you could try revising your design as if Vbulkmin = Vrfl, and calculate everything for that condition even though you will never run your system at that low voltage. This is analogous to designing for 85Vac to 265Vac, but operating only from 180Vac to 265Vac. But I suppose that would de-optimize the value of Lm for the real minimum voltage.

    The purpose of designing at low input voltage is to avoid the additional demag-time factor that is needed build up negative current in Lm, which is used to drive the resonant ring down to zero (achieve ZVS) when Vbulk is > Vrfl. Without this negative current, Vrfl would only ring down partially toward zero and we lose ZVS.
    But building up the extra negative current adds additional time to the demag time, and also adds a little more time to the primary on-time. The positive peak current has to increase a little to accommodate the extra energy needed to generate the negative peak. Both of these extra times significantly complicate the switching period equation from which Lm is derived. That's why I used low-line as a design point, where these complications are not present. I didn't consider a case where "low-line" was higher than the reflected voltage.

    I'm trying to visualize this in my head: If the ratio of Vbulkmin/Vrfl >1, then the extra time to build Ineg necessary to drive the resonant valley of Vrfl to zero could be roughly proportional to that ratio. For a given Lm, this extra time would increase the total period (decrease fmin) by a factor. To get back to the target fmin (increasing) you'd have to decrease Lm by about that factor. If Vbulkmin were =2Vrfl, then I visualize the additional time to be about ~5% of the total period (this is completely "scientific" guess work, based on a mental image of the total switching intervals in a cycle and their relative durations).
    So for a crude approximation, I'd design Lm for Vbulkmin = Vrlf, and afterward apply the correction factor to Lm(nom) as here: Lm(nom)_actual = Lm(nom)_calc*(1 - 0.05(Vbulkmin/Vrfl - 1)). I'm not sure how accurate the 0.05 is (it could be 0.03, 0.04, 0.06, etc.) nor how linear it is. Again, this is a guess, but maybe not too far off. Experimentation would help refine it, if anyone has time for that.

    I hope this helps you further.
    Regards,
    Ulrich
  • Hello Ulrich,

    Thanks for your thoughts.  I appreciate the educated guess on the effect of Vbulkmin > Vrfl, and will build that into my copy of the worksheet.  If you don't have a precise answer for this, I certainly won't be able to deduce one!

    There are many places in the design where I'm having to make guesses and/or override the worksheets, and I'm starting to dread the process of bringing up the prototype.  Unless you're very lucky, you can either understand the IC in the design phase or in the hardware, but you will one way or another.  Changes are just a lot harder in hardware.  Mother Nature doesn't care though.  She will blow up in your face or work incomprehensibly, all in elegant compliance with her beautiful laws.

    Regards,

    Gerrit