bq24705, near 100% duty cycle

What is voltage on PVCC pin? If it is much lower than 18.4V or 18V, it means too much voltage drop at the input circuit.

Also, bq24704 has 300kHz switching frequency.  For same duty cycle (ouput/input ratio), the high side FET off time of bq24704 is doubled than bq24705's. Changing to bq24704 could also resolve the problem. But, the inductor value need to increase. That may need a bigger size inductor.

Thanks for the reply.

Yeah my input voltage drops to 18v or so when the duty cycle is high. I expected that the switching would reset much quicker, and only in order to charge BTST. It looks like this is happening at at least some at the end of the burp.

But the dead time of 10mS, and then softstarting again is wierd.

At this point I can connect my input directly to the batteries and get an appropriate charge rate of 1.6A.

at 300Khz, wouldn't my duty cycle still go to 100% at some point, and put me in the same spot?

Mike

Yes. The high side bootstrap capacitor can not hold the voltage forever. When the voltage of bootstrap capacitor is lower than 4V Vbtst-refresh threshold, the low ide FET has to turn on and charge the bootstrap cap voltage up. That is why you saw the burp.

When low side FET turns on, it keeps 80ns on time. If adding the dead time on rising edge and fall edge, the total minimum on time is 140ns.

At 600kHz; 18Vin; 16.8Vout, the ideally low side FET on time is (1/600kHz) x (18-16.8)/18=111ns. So, it is shorter than the 140ns low side FET minimum on time. The charger has to skip some low side pulse. That is what you see.

If change to 300kHz, 18Vin; 16.8Vout, the ideally low side FET on time is (1/300kHz) x (18-16.8)/18=222ns. It is longer than the 140ns low side FET minimum on time. You may not see the burp. 

74204 (300Khz) is working better. Thanks. Still not enough margin. So I lowered the inductance, I had 1.0uH handy, and that extends the margin significantly. What limits how far I can reduce the inductance, besides the peak current? I only need 1.5A avg output current.

Mike

I don't think you can reduce inductor to 1uH. The peak to peak ripple current is 13.9A at 18.4Vin, 12Vout and 300kHz switching frequency. At that condition, the current limit circuit may not work. Also, the efficiency may be bad. Please keep the peak to peak ripple current smaller than the average DC output current. 

My source is limited to 1.5 A, so the input voltage for charging at 12V will be much less. I am also using ACSET to limit the input current. Does that resolve the peak current issues? Are there any other issues I need to be concerned with?

I am of the opinion that this charger chip is not really a good candidate for a 4 cell system. For instance, with the max input voltage rating, what is the maximum voltage input source that you would design into the product? Especially on the 600Khz model, there is not really enough head room, in my opinion. At the least, the data sheet should recommend minimum input voltages for a 4 cell design. This limitation was certainly not apparent from the datasheets.

Of course, now that I understand the buck better, I would choose a higher input source voltage ( I have limited choices), or, choose a charger chip that limits DC to < 100%.

BTW - THANK YOU WANG very much for your help. I appreciate your time.