In a design, I have four LZMZM33603 modules, which I want to synchronize. An FPGA drives the EN/SYNC input of each LMZM33603 using 3.3V signal levels. Each LMZM33603 module is enabled independently. For each LMZM33603, can I connect one FPGA output signal directly to the EN/SYNC input for one LMZM33603, and drive that output at the synchronization frequency?
The LMZM33603 datasheet section 7.3.6 'Synchronization (SYNC)' shows an AC-coupled SYNC clock source added to the EN level (produced in figure 26 through a resistive divider). The datasheet section 6.5 shows EN as a digital input, which suggests that driving with a 3.3V digital signal would work just as well. I would prefer to use one FPGA pin to drive EN/SYNC rather than two pins with a capacitor/resistor summing junction.
Can I leave out the RT resistor? The WebBench output specifies an 88.7k Ohm resistor on RT, for a nominal switching frequency of 450kHz with 24V input. This is not far from the 400kHz switching frequency with the RT pin open, and according to datasheet table 3, the RT pin can be left open for 5V output. Since I am driving EN/SYNC anyway, can I just leave the RT pin open, and adjust the frequency through SYNC?
