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TPS7A16: TPS7A16 and behaviour of PGOOD (PG)

Part Number: TPS7A16

Hello,

We are working on a design in which we use the TPS7A16 (adjustable) as voltage regulator. We like to use the PG signal to detect powerloss of the TPS7A16 itself..

However we are not sure how the PG signal behaves in case the TPS7A16 as a whole is not powered itself.

Thanks for any suggestions or tips,

Jeroen

  • Hi Jeroen,

    The PG pin is an open-collector output with a transistor connecting the PG pin to GND internally. When power is not good, the transistor turns ON, pulling PG pin low. When power is good, the transistor is OFF, the PG pin is high impedance and allows the external pull-up to pull the PG pin voltage high.

    If the TPS7A16 loses power with 0 V on the IN pin, the LDO will not be able to drive the PG transistor so it will be OFF. PG pin will be high impedance. The PG pin voltage will then depend on the pull-up voltage.
    - If the PG pull-up resistor connects to the LDO OUT pin, the PG voltage will be 0 V.
    - If the PG pull-up resistor connects to some other voltage still up on the board, then it will pull-up to that voltage.

    The PG pin indicates when OUT > approx 85% of nominal output voltage. PG does not indicate if the LDO loses power.