Hi Sir
When I design TPS650940 for APL LPDDR4
Have anything I need to take care ?
Beside VTT pin can be floated and PVINVTT and VTTFB shorted to GND
Thanks
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Hi Kenny,
You are correct. SWB1 and SWB2 are expected to be shorted together at their output and then connected to V1P8U which is used as VDD1 input for LPDDR4.