WEBENCH® Tools/TPS40210: Output peak to peak noise (spikes)

TEJINDER SANDHU

Part Number: TPS40210

Tool/software: WEBENCH® Design Tools

I want to design a 80V 0.8A output dc supply from a 18V - 24V DC input using the TPS 40210.

I simulated the webench circuit on the web and also in Tina, in both cases the circuit maintained the correct average output voltage of 80V at 0.8A load. However there are very narrow spikes at the output (impulses at the falling and rising edges of the MOSFET switching waveform) which results into an output voltage ripple of like 2 volts. I guess it might just be a simulation bug but i just want to be sure before I finalise the design on a PCB.

Hence, are the output spikes a simulation error or are they actually there? I am attaching the webench simulation to show the spikes.

Thank you

over 7 years ago

0 Jasper Li over 7 years ago

TI__Mastermind 46905 points

please try a add a 0.1uF ceramic capacitor in parallel with the output aluminum capacitor. the ceramic capacitor is also required in real circuit as the aluminum normally have large ESR and ESL.

0 Garrett Roecker over 7 years ago in reply to Jasper Li

TI__Mastermind 21720 points

Hi Tejinder,

Jasper is correct. This is most likely cause to the ESR of the electrolytic output capacitance. Adding ceramic capacitors helps to reduce the ESR and keep the high frequency ringing to a minimum.

Please let us know if you have any questions.

Thanks,

Garrett

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WEBENCH® Tools/TPS40210: Output peak to peak noise (spikes)