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BQ78350-R1: Short circuit protection fails

AdrianBarnas
Prodigy 50 points
Part Number: BQ78350-R1
Other Parts Discussed in Thread: BQ769200, , BQ76920, BQ76940

Hi,

I have a problem with proper short circuit protection design  for BQ78350-R1 working with BQ769200 AFE IC. Battery is protected using OptiFets two parallel  for charge and two parallel for discharge. Transistors are rated for 100A.

A short circuit in discharge protection is configured as listed below.Both Latch and normal protection is enabled in settings. And was tested to work as configured, close FET if there is a short circuit, open and close after 10s and then latch for 240s. During short test in office we do not observed temperature rise.

During 1h short circuit test in 50 degC conducted by certified body after 15minutes protection failed and battery burned.

So my questions is what are possible purpose of short circuit protection fail as designed in BQ76920?

Second: what can be the purpose of over temperature protection fail than?

Third: is there any way to configure or design more reliable protection against long lasting short circuit for example prevent recovery if the latch limit is exceded? Using BQ769200 and BQQ78350-R1 of course.

Any help would be appreciated.

  • 0
    Prodigy 50 points

    Configuration screen because attaching to original post failed.

  • 0 in reply to AdrianBarnas
    TI__Guru 54715 points
    Hi Adrian,
    The bq78350-R1 allows time based recovery from short circuit. Basically it will re-try after a time period to see if the short re-occurs. The latch can allow for a longer time before continued trials, but the maximum for either is 255 seconds (about 4 1/4 minutes). If the FETs are not cooling sufficiently during this time, requiring a signal sequence such as PRES to recover from the SCD fault may be a better choice, see section 3.1.3 of the technical reference manual.
    For low side switched systems see the LPEN option mentioned in 3.6.2. LPEN uses the load present comparator on the bq76940 charge pin as a check before enabling recovery. Since the pull down on the pack pin is weak, a capacitive load may make recovery very slow, or a residual load may prevent recovery and either could require a charger connection with voltage to recover from the fault. The load present comparator is not useful when the CHG pin is buffered or used for a high side switch.
    Also with parallel FETs, be sure the FETs don't oscillate during switching, this could add heat which may not be present in more normal circumstances.
  • 0 in reply to WM5295
    Prodigy 70 points
    For high side FET, how to recover from SCD fault, thanks.
  • 0 in reply to user5034713
    TI__Guru 54715 points
    Hi User,
    Please see the technical reference manual section 3.6.2 Short Circuit in Discharge Protection. With high side switching don't use LPEN. Also see section 3.1.3, PRES allows a hardware signal based recovery rather than time.