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TPS3808: TPS3808G12DBVR

Charles Voyles
Prodigy 30 points
Part Number: TPS3808

I've inherited a previous design topology that had a 49.9K pull-up on the CT input as well as 20nF capacitor to ground.  What will be the effect on the delay timing?  The resistance alone provides 300 mS while the 20 nF should provide 114.78 mS.  Can the effect be calculated?

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    TI__Genius 9375 points

    Charles,

    To set the delay time on the TPS3808, there should only be 3 options used: using a 40K-200K pull-up on the CT pin to drive a fixed 300ms delay, leaving the CT pin floating for a fixed 20ms delay, or using the equation in the datasheet I pictured below for a custom delay. I'm confused as to why on the design there is a pull-up as well as a 20nF cap. Is it possible to consolidate and choose one of the recommended options in the datasheet?

    Pertaining to your question, I don't think we can calculate the actual effect this is having without some testing. It may not be as simple as compounding the delay times

    .

    Thanks,

    Abhinav