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TPS40428: Rising waveform is not monotonic (found negative slope)

Part Number: TPS40428

Hello,

We're using TPS40428 for 12V to 0.9V DCDC buck design and we found the rising waveform is not monotonic ( there's a negative slope) during start up (both with no load and full load)..

I’ve tried to 1) increase the ss time by PMBus, 2) add noise bypass cap between VSNS and GSNS pin but got no any improvement.

I also checked the TPS40428 Vdd, BP5, BP3 and Vdd on MOSFET, no drop there.

I want to check the prebias function but cannot find the register.

We need your support to check is there any register that I can try to resolve this issue asap.

BR.

Stan.

  • Hi ,

    we will reply to you tomorrow.

    Regards.
    Weidong
  • Hi Stan,

    This is a known behavior. When TPS40428 is at 2phase configuration, current sense signal (IOUT) from smart power stage is applied to the control loop for current sharing purpose.

    When soft start begins, CSD95372B needs several switching cycle to make IOUT signal follow inductor current well. As IOUT signal does not follow inductor current well during first several switching cycle, it causes a small glitch on Vout.

    Because the glitch happens at low Vout condition, in most case it should not affect load circuit. I would suggest to leave the glitch as it is if the glitch is fine to load circuit.
  • It is difficult to eliminate the glitch, but If you do want to reduce the glitch, below two method helps.

    1. Add a 8.06k resistor between CSN and ground.
    2. Add a 5k -10k resistor between ISH1 and ISH2. This method has negative impact on current sharing performance. Larger resistor value, higher impact on current sharing performance. I would suggest to try 5k ohm first.

    Thanks
    Qian
  • Hi Qian,

    Thanks for your information. What if we only enable first phase during start-up then enable the 2nd phase later, does TPS40428 support this function?

    Stan.

  • HI Stan,

    At 2phase configuration, the controller will turn on and off two channels at the same time.
    There is no way to turn on ch1 first then turn on ch2.

    Thanks
    Qian
  • Hi Qian,

    I changed ss time to 0.6ms / 8.06K between ISH1 and ISH2, and got better waveform.

    The side effect is higher overshoot by faster ss time, current sharing at light load with 5% err.

    May I know the reason why we add RES between ISH1/2? Does it force the current go through one phase first to reduce the Vdrop?

    Stan.

  • Hi Stan,

    Adding resistor between ISH1 and ISH2 equivalently reduces current sharing gain, and it reduces the impact of glitch of current sense signal on the loop.

    Regarding the overshoot at the end of soft start, it should be related the the soft start time and the control loop.

    With short soft start time, the control loop should be fast, otherwise overshoot may occurs.

    To solve overshoot problem, you can make soft start time longer, or tune control loop to make it faster (increase cross frequency, increase compensation gain).

    Thanks

    Qian

  • Hi Qian,

    Thanks for your comments, I will fine tune the control loop after customer's approval for this rising waveform.
    We saw the same glitch if we extend the ss time even with current solution.

    Stan.