UCC27524: UCC27524 range extender solution for TMS3705

Hi Nick,

Thanks for asking about UCC27524. Im an apps eng that will help you out. Let me reach out to the designers that made this app note to hear what they have to say about this concern, let me update you asap.

The antenna is a resistive, capacitive and inductive complex load. The datasheet specifies power consumption for a purely capacitive linear load. To find power dissipation of a complex nonlinear load we need to separate these components for superposition so we can plug them into linear equations.

Power dissipation seen by the gate driver, driver losses, can be considered as a ratio of the internal output stage impedance with the power consumed by impedance in the charge path. With a complex load, a complex impedance model of the antenna would need to be obtained after which complex voltages and currents can be realized with simulation. After we have complex values for how the driver will behave when the antenna is switching from 15V at 134.2khz we can use linear equations.

The max power dissipation of a capacitive load can be found from P=Q*V*Fsw (Q*V is the energy) where Q=CV for capacitor, the max power dissipation occurs when the peak current occurs during each switching cycle because the cap acts as a short circuit for high frequency and for the high current gate driver pulse the FET load Cgs looks like a short that the driver sees. Q=LI^2 for inductor which makes the power dissipation equation P=L*I^2*Fsw. Solving for this equation does not give a real answer because of the non linearity of the load, it seems that the peak current does not reach the 5A peak but a lower value determined by the complex impedance of the antenna.

L=uH is larger than typical nF cap value -> this means for energy to charge the inductor and more energy that needs to be dissipated I = 5A peak which is more than the 1A peak from the antenna driver -> this will make the power dissipation 25times more however since theres an inductive load the switching voltage/current may overlap during turn off and slowly ramp during turn on which will complicate things further for switching losses.

The antenna also acts as a small heatsink gate resistor due to the 10ohm ESR at frequency. This ESR will act like a resistor divider or heat divider and ratio the power dissipation or total energy to the other resistances in the path like the 4R7.

Thanks,

Hi Nick,

I am still waiting for a reply from the designer and will update you asap.

To update you on my response, From figure 13, Since the drive scheme puts the inputs alternating and not consistently 134.2khz I think we can consider this to be one driver in terms of power dissipation. We just need to consider how much current the driver is actually outputting.

The inductance limits the current to ramp at a rate of dV/L, the current should reach only as high as the ramp times the duty cycle.The time constant L*R of the antenna is much larger than the period and even the R*C constant so the antenna is probably not fully discharged. Therefore the delta V the driver experiences is not large enough peak current to create excessive losses in the driver.

A ballpark the power dissipation for a cap can be estimated by C * V^2 * Fsw assuming CV^2 = LI^2 we get L * I^2 * Fsw with L and Fsw fixed at 440uH and 134khz the only variable is how much current the driver will output. We can say the peak current is the difference in gate voltage divided by loop resistance. I_peak = dVdriver/Rdriver. If the inductor is charged then dVdriver is 5 at most so I_peak is about 300mA if R_driver is 15 ohms. This makes about 5W of power dissipation at 134.2khz (mostly dissipated by the antenna 10 ohms).

You can check out an great app note on the Fundamentals of Gate Drivers section 2.7 on power losses (). Does this clear up some confusion?

 

Hi Nick,

I was thinking VCC=15v was the driver voltage applied to the gate, (Vdriver). If the inductor part of the antenna doesnt fully discharge when the FET is off then the antenna will switch from 10v to 15v so there will be only 5v swing on antenna every cycle, this will limit the power dissipation.

What is the driver supply voltage?

At room temp the max power dissipation of UCC27524 is about 0.88W.

If we consider only the resistive portion of the antenna spec 10 ohms

V^2/R average power says that the antenna dissipates about 23W (and if the antenna voltage goes back to 0V then the transducer dissipates this power every cycle)

According to the ratio of resistances on the gate path 66% is from the 10ohms 33% is from the 4.7ohms will dissipate in the path respectively.

This leaves only about 1% of total resistance in the gate path coming from the internal output structure of the driver (0.5 ROL).

1% of 23W is 0.23W which is less than the max power dissipation

Can you sim or bench test this circuit to see the gate current waveform?

this will allow us to know how much current the driver is sinking and sourcing and therefore also dissipating.

We can take this current then multiply by Roh/Rol then we can know the real power dissipated internally every cycle.

Thanks,

Hi Nick,

Thanks for clearing up my understanding on how this topology works.
The resonant or switching frequency is 134.2k? I was thinking the Fsw.
This average current value seems ok however the only inconsistency I see is that Roh does not equal 7.5 ohms. From page 14 of the UCC27524 datasheet says Roh is dynamically equal to 1.5*ROL=1.5 ohms. This makes the current 680mA and the power dissipated in the driver about 1.2W which is about 300mW too much. I recommend increasing the 4R7 gate resistors. Increasing to 6R and beyond will decrease the drive current to .375 enough to keep the junction temp below the rec op max.

Let me know if this does not help your issue.
Thanks,

Hi Nick,

thanks for the update,

the datasheet has this info. However its only for capacitive load.
Check out section 9.2.2.5 and 11.3

Also check out the first section of the IC Package Thermal Metrics (SPRA953). It explains how to find the Rja of your own system so you can calculate the max allowed power dissipation of the driver on the pcb.

Thanks,