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BQ76920EVM: After I disabled the DSG MOS and the CHG MOS using FET_EN command in bqStudio, the battery can still discharge.

Lu Feiyue
Intellectual 660 points
Part Number: BQ76920EVM
Other Parts Discussed in Thread: BQ76920, BQ78350, , TIDA-00792

I  design  my bq76920  board   according to  the  document   slvu924c ：bq76920 Evaluation Module User's Guide

yet,  I find  a  strange  phenomenon

I  disabled the DSG MOS and  the CHG MOS using  FET_EN  command in bqStudio.

And  the DSG MOS  and  the CHG MOS  are  closed definitely,  their Vgs  are both 0V.

I  connect  three wires GND, SMBC, SMBD  to  my  power board  GNG, IIC_CLK, IIC_DATA,

And I  connect PACK+ and  PACK-  to my  power  board to supply  power for  it.

I   apply  a  0.5A load to  my power board. 

The read  current  of  bq78350 is  0A.  but  my power  still can  supply the desired current.

 I guess  the current  runs  through  the GND of  SMBus.

Because  PACK+ and BATT+ are  connected  directly,  and my  power board   connects  the negative electrode of the   battery  through   the GND of  SMBus.

 As a result,  the  battery is  connecting  with my  power  board directly  regardless of  the  status of  the DSG MOS  and  the CHG MOS .

I  think this  is  a serious mistake.

In another  design document, named  tidrqy7 of  TI,   the DSG MOS  and  the CHG MOS  connect to  positive electrode of the battery.  

And  I  think  this  design  doesn't  have such  a problem.

What  is  the component NT1  connecting  the BATT- and  GND?

I  didn't  use such a  component,  I  use the BATT-  to be  the GND.

Am I right？  Should  I use the Schematics of document tidrqy7  instead of   document slvu924c?  How  can I solve the  problem?

  • 0
    TI__Guru 54715 points
    Hi Feiyue,
    The proper schematic for reference will depend on your system need. The bq76920EVM is more of a evaluation platform only than an example of a system design. Some of our other evaluation modules and the TI Designs do look more like a product circuit. The bq76920EVM interface references the GND, the battery negative. This might be used In systems with isolation, either physical such as processing and display in the battery or electrically with an isolated interface. Disconnecting the bus lines as shown in figure 10 of www.ti.com/.../slua726 is another option to avoid leakage, but leaves the battery unable to communicate when in fault. High side switching allows simple PACK- referenced communication which avoids leakage during fault but retains the communication path. The TIDA-00792 (tidrqy7 ) shows an example of high side switching. Some BMS parts have high side switch drivers built in, the bq769x0 devices do not.
    The NT1 component is a net-tie. It the EDA schematic it allows connection of 2 nets with different names. In the EDA layout tool it is a controlled pattern to make a connection on the PC board. In this circuit it is used to control the point where the signal ground connects to the high current path. This avoids having different components connected to GND from seeing different voltages as the current through BAT- changes. You don't need a NT component or feature on the board, but it can help get your circuit connected the way you intended when some else does the board layout.