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BQ29209: External Cell Balancing Application Circuit - Balancing Current Issue

Daniel Rodrigues36
Prodigy 40 points
Part Number: BQ29209
Other Parts Discussed in Thread: BQ76200

Hi,

 

I am having trouble with the implementation of the external cell balancing circuit for the BQ29209 from the datasheet.

 

 

We are using the following values for the passive components in the circuit:

 

Rin = 1k

Cin = 0.1uF

Rcb_ext = 2x 5.1ohm resistors in series (10.2ohm total)

Ccd = 0.1uF

Rvd = 100ohm

Cvd = 0.1uF

Rclamp = 2.21k

 

Q1 = DMG1012UW-7

Q2 = DMG1013UW-7

 

According to the datasheet equation, we are expecting that Ibal = Vcell / Rcb_ext. If we take the case where the lower cell (Cell1) is being discharged to match the top cell, we are seeing that there is a voltage drop across the FET (Q2) which seems to be coming from a small Vgs, which in turn causes the cell balancing current to be less than our designed value. The Gate drive voltage from VC1_CB is ~0.2V which should be in the correct range to turn on the FET, but the FET Source voltage seems to not be high enough to drive the FET to a point where it has a low resistance such that it is negligible in comparison to Rcb_ext.

 

The voltages we are seeing are the following:

 

VCell2 = 3.85V

VCell1 = 3.97V

V-Rcb_ext (Voltage across Rcb_ext) = 2.6V

Q2-VGS (Voltage across Rclamp) = 1.18V

Q2-VDS = 1.367V

 

We have tried reducing the Rcb_ext resistor value, but the result was an increase of the Gate and Source voltages to the FETs while maintaining the same current draw. We also tried increasing the Rclamp resistor value 4.7k but this only reduced the VC1_CB gate drive voltage closer to 0V, but did not increase the cell balancing current.

 

Are there different resistor values we should be using?

Is there an issue with the FETs that we have selected, and if so, what is the parameter we should be optimizing?

  • 0
    TI__Guru 54715 points
    Hi Daniel,
    In the bq76200 data sheet figure 11 the transistors operate in a source follower mode when on. The author of the data sheet did not include the gate-source drop in the equation, or planned for a figure with a different topology which was not included.
    If you operate the circuit as shown you will get an effect as you have measured, adjusting Rcb_ext will adjust the current some by altering both the source current and the divider value to the gate. Adjusting the Rclamp will adjust the voltage divider with the internal balance resistance (not shown, but approximately 300 ohms) to change the gate voltage slightly thus changing the balance current slightly. The voltage drop across and power dissipation of the FET will be significant.
    If you move the Rcb_ext to the drain of the transistors they would need to be separate resistors, but with the source connected to the common point of the cells the V1_cb pin should be able to fully enhance the transistors. Rclamp would still connect from gate to source. The 2 different Rcb_ext could be different values to adjust for differences in the FETs if desired.
    I have not tested either of these configurations.