[FAQ] TPS650830: Can you help to understanding Emergency Shutdown?

What is Emergency Shutdown?

Emergency Shutdown is a mode that the device may operate in. In this mode DPWROK is driven LOW to provide an alert to the system of an impending shutdown. Next, all regulators are disabled and discharged through the 200 ohm discharge resistors in the PMIC. The 1Hz clock is disabled as well.

How does device exit Emergency Shutdown?

The device remains in this shutdown state until one of the following events occur:

PWRBTNIN detects a transition from HIGH to LOW
ACOK detects a transition from LOW to HIGH
All input power is removed from the PMIC

What are the possible causes of an Emergency Shutdown?

Power Fault
Power Good goes low for 10 ms while EN is high which, can be caused by:
VR reaching current limiting causing Vout to droop below PG threshold
Incorrect configuration of the PGx, ENx, and VSx pins and wiring
Excessive current on external rails or external rails not powering up in time
Most likely cause if you are seeing shutdowns during debug phase
Software Shutdown
Write a ‘1’ to bit 0 of SDWNCNTL register x49
Hardware Shutdown
Pull SHUTDOWNZ to logic LOW, (ground).

Thermal Fault
Any die temperature monitor on chip reaches 130C.
Pushbuttonheld for x extended period of time.
See register x14 PBCONFIG for settings and operation

What Happens to Internal LDOs in Emergency Shutdown?

While all VRs and VTT LDO are turned off in Emergency Shutdown, the internal LDOs do not turn off. These Internal LDOs include the following: LDO3V, LDO5V, V3P3A_RTC and VREF1V25. In-fact these internal LDOs will never turn off in any state if the VIN to the device is valid, (VIN > UVLO).