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TPS22810-Q1: About delay beween Vout switch turn on and QOD turns off

Tomohiro Nagasawa58
Expert 1570 points
Part Number: TPS22810-Q1

Dear support team

Seeing datasheet,it seems that Vout switch turns ON and QOD turns OFF when VENR threshold is exceeded.
If so, I think there is some delay from when QOD turns off until the Vout switch turns ON.

(1)Could you provide the worst-case value of the delay from when QOD turns off to when Vout switch turns on at that time?
(2)Could you provide EN falling as well?

Thanks

Best Regards

Tomohiro Nagasawa

  • 0
    TI__Genius 15780 points

    Hi Tomohiro,

    When the enable pin is pulled high, QOD is disabled and then the FET turns on. Relative to the delay time and rise time of the FET, turning the QOD path off is very quick. If you are looking for any delays in the turn on behavior for the device, then you may be looking for delay time, or tD. Figure 8 in the datasheet shows how this parameter can vary over temperature and voltage.

    For delay time before the device starts to turn off (enable pulled low), we have some scope shots you can reference, such as those in figure 13 and figure 15. Here you can see that there is only a 2.5us delay before the output is pulled low and QOD is active.

    Out of curiosity, are you using the QOD pin as an indicator that feeds to a microcontroller or other logic in the system? Why is the QOD delay timing necessary for your application?

    Thanks,

    Alek Kaknevicius

  • 0 in reply to Aleksandras_Kaknevicius
    Expert 1570 points

    Hello Alek-san

    Thank you for quick response. And sorry for lack of explanation.

    QOD is connected to Vout.

    When device turn off, does Vout switch turn OFF after QOD turns ON?

    If so, their concern is that current will flow from Vin to QOD in state of ②.(Please see attached file)

    Could you provide the max value of ② period?nk you for quick response.

    (Of course there is no need to guarantee.)

    TPS22810 Delay time.xlsx

    Regards

    Tomohiro Nagasawa

  • 0 in reply to Tomohiro Nagasawa58
    TI__Genius 15780 points

    Hi Nagasawa-san,

    I took a look at your excel file, but this is not the way the device operates. There is no state 2 in the device, so in a sense the maximum value of the 2 period is 0us. The way the device works when turning off is that the power FET gate is fully discharged before the QOD transistor is turned on. The device will not turn on the QOD transistor until the pass FET is fully turned off. Therefore, there is no risk for current flow from VIN to QOD when turning the device off.

    Thanks,

    Alek Kaknevicius

  • 0 in reply to Aleksandras_Kaknevicius
    Expert 1570 points

    Hello Alek-san

    Thanks for the good explanation.

    I understood the timing chart as attached diagram.

    Please let me know if it is wrong.

    TPS22810 rise and fall operation.xlsx

    Regards

    Tomohiro Nagasawa

  • 0 in reply to Tomohiro Nagasawa58
    TI__Genius 15780 points

    Hi Nagasawa-san,

    Your file is correct, the waveforms reflect how the device operates. Please let me know if you have any additional questions.

    Thanks,

    Alek Kaknevicius